[SOLVED] TIA DC BIAS Questions

[jmdennis]

Hi all,

I am doing a simulation of transimpedance amplifier with resistor feedback using Cadence, as shown in Appendix. (The opamp is 2-stage pmos-input miller opamp).

I assume that both input terminal voltage should be zero. So that it can operate properly. But when I run the simulation, I found that the opamp went to saturation and the output voltage fed into input terminal so that the voltage of negative input (VIN-) is not zero.

I try to force both terminal to ground , but it does not give me any gain.

I also try to put a capacitor in series with feedback resistor to avoid output voltage feeding through input, it works , but this does not look the normal way we use the transimpedance amplifier. also the extra capacitor also alters the high frequency response.

Does anyone give me some hints on this circuit simulation?

Many thanks,



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Sorry, the series capacitor alters the low frequency response, and I use 100uF capacitor to make low frequency response flat. This is not acceptable in IC design...

 

[crutschow]

You don't have a negative supply voltage to the amp. Unless the amp is specifically designed to operate down to zero volts at the input and output you need both a positive and negative supply voltage.

 

[jmdennis]

You don't have a negative supply voltage to the amp. Unless the amp is specifically designed to operate down to zero volts at the input and output you need both a positive and negative supply voltage.

Hi I finally get it done.

It turned out that I made the VIN+ and VIN- the other way round when designing Miller Opamp. I have checked Sedra's book the one close to Miller cap is VIN+. Why this matters?

Also I don't need to bias VIN+ at 0V in my case. Otherwise, it has smaller offset. Bias at 0.3V just fine.. Now it works perfectly.