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three-phase PLL chip

kappa_am

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Hi,
I am working on a grid-connected converter. I need a 3-phase PLL. I prefer not to implement it through software. I would be grateful if you introduce me a 3-phase PLL chip with low noise susceptibility; if it is available and you are aware of. I found a couple of single-phase PLL, but not a 3-phase one.

Thanks,
 

wwfeldman

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why 3 phase?
Once you have one phase, the other two are shifted from it

you could use 3 PLL - one as master and two slaves
 

kappa_am

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We have lots of power quality issues related to grid voltage like fluctuation, sag, swell, harmonics, etc. In my opinion, a single-phase PLL cannot track Angle correctly in this situation. A simple method to implement PLL through software is using Park transform and Moving Average Filter to filter out the mentioned noises. There are many other methods also Complex Coefficient Filter, Notch filter, etc. I think since grid-connected converter is a common application, is any chip available?
Are three separate PLLs able to cancel out the errors?

Your comment is appreciated.

Thanks
 

KlausST

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Hi,

Something like CDCE937?

I personally agree with wwfeldmann. I'd use one PLL and derive all thre phases from it. Then you get perfect phase relationship.

Maybe you can use all three phases as input clock somehow to average/minimize the error (related to a single phase input).
My idea is that best behaviour is like good old mechanical 3 phase generator. 3 x sinewave with fixed phase relationship.

Klaus
 

FvM

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We have lots of power quality issues related to grid voltage like fluctuation, sag, swell, harmonics, etc. In my opinion, a single-phase PLL cannot track Angle correctly in this situation. A simple method to implement PLL through software is using Park transform and Moving Average Filter to filter out the mentioned noises. There are many other methods also Complex Coefficient Filter, Notch filter, etc. I think since grid-connected converter is a common application, is any chip available?
Are three separate PLLs able to cancel out the errors?
Sounds like you are asking for a three-phase PLL without being able to specify the required behavior. Shall the "3-phase PLL" track arbitrary phase relations and phase voltage as well as transient events (sag)? That's neither wanted nor possible.

The voltage and current controller of a grid connected inverter is a key component. It's a nice idea to ask for a "chip" that saves you from designing the controller, possibly get rid of the complex theory behind it.

- - - Updated - - -

Maybe you can use all three phases as input clock somehow to average/minimize the error (related to a single phase input).
My idea is that best behaviour us like good old mechanical 3 phase generator. 3 x sinewave with fixed phase relationship.
A typical active front end is using a sinusoidal current reference with 3x120 degree phase generated by a PLL and a voltage feedforward scheme tracking the actual grid voltage, in so far also considering voltage imbalance and transient events. As proposed by KlausST, the PLL would average between actual line phases. There are however additional objectives like fault ride through for larger grid connected inverters.
 

BradtheRad

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3-stage chaser creates timing signals, staggered 120 degrees, 50 percent duty cycle.

Select values so oscillating frequency is same as mains frequency (more or less).
Then apply grid waveform to the circuit (through invert-gate and resistor).
System automatically generates transitions which are aligned with incoming waveform.
If desired the other phases can be applied to the other device inputs. (Notice the 3 phases are in reverse sequence, 3-2-1 not 1-2-3).
The system is able to match itself instantly to an incoming waveform.

3-stage chaser invert-gate makes 3-phase outputs aligned w 50Hz sine input.png
 

mtwieg

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FvM beat me to it, but your 3 phase PLL is ill-defined, and I doubt such a magic chip exists (for good reason). Pretty much all PLL chips are designed to work with a PFD frequency much greater than the line frequency (like 100kHz or more). For such slow signals, doing it in software is is the obvious route. Yeah you have to do some coding, but the flexibility that comes with that software is very valuable.
 

wwfeldman

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We have lots of power quality issues related to grid voltage like fluctuation, sag, swell, harmonics, etc. In my opinion, a single-phase PLL cannot track Angle correctly in this situation. A simple method to implement PLL through software is using Park transform and Moving Average Filter to filter out the mentioned noises. There are many other methods also Complex Coefficient Filter, Notch filter, etc. I think since grid-connected converter is a common application, is any chip available?
Are three separate PLLs able to cancel out the errors?

Your comment is appreciated.

Thanks
It appears you want to take your incoming 3 phase line, with all the problems you described, and produce a clean three phase line.

Instead of building a phase locked "cleaner", why not rectify the incoming line, put int a storage capacitor,
and build a 3 phase inverter? No phase locked loops necessary.

a motor generator set is even simpler and the rotational inerita of the pair will keep the output nice

what is your device going to power? if the next downstream device is going to rectify the incoming 3 phase,
then maybe you want a DC regulator instead?
 

FvM

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For such slow signals, doing it in software is is the obvious route. Yeah you have to do some coding, but the flexibility that comes with that software is very valuable.
Just what I mean. Didn't say that the OP's "nice idea" is realistic. I use to implement AFE controllers in FPGA, but it's well possible with performant uC. PLL is a code block in the design framework, usually implemented as all-digital PLL (sine NCO with quasi analog PFD).

- - - Updated - - -

Instead of building a phase locked "cleaner", why not rectify the incoming line, put int a storage capacitor,
and build a 3 phase inverter? No phase locked loops necessary.
OP is obviously designing grid connected inverters. Necessary to track the power line voltage and phase in this case.
 

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