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thesis on multipliers

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samiksha

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hello!
i'm doing my thesis on comparison of multipliers. nd i'm over wid the codes of booth, wallace and booth encoded wallace tree multiplier and calculated their delay nd the delay comes out is least for booth encoded wallace tree multiplier and for the multiplication of two 8-bit signed numbers. nd the delay is 15.619ns nd the max. speed of operation for this is 64.18MHz. will u suggest me any other option for comparing these multipliers. or it 'll be ok for my thesis work????????
i'm working on xilinx environment.................
kindly gv ur valuable suggestions...............
Plz its urgenttttttttttttttttt.
reply as soon as possible
i'll be Thankful to you
 

robinh

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Hi,

I suggest you search for the following ebooks on Internet (emule) :

*- Arithmetic and Logic in Computer Systems (Wiley Series) by Mi Lu

*- Digital Computer Arithmetic Datapath Design Using Verilog HDL: CD-ROM included (International Series in Operations Researchand Management Science) by James E. Stine

*- Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems by Gery Bioul, Gustavo Sutter, Jean Pierre Deschamps

Good Work!
 

samiksha

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Thanks for ur suggestions. if u get any idea abt relevant to this topic plz share wid me.
Thanku
 

nithin.j38

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samiksha said:
hello!
i'm doing my thesis on comparison of multipliers. nd i'm over wid the codes of booth, wallace and booth encoded wallace tree multiplier and calculated their delay nd the delay comes out is least for booth encoded wallace tree multiplier and for the multiplication of two 8-bit signed numbers. nd the delay is 15.619ns nd the max. speed of operation for this is 64.18MHz. will u suggest me any other option for comparing these multipliers. or it 'll be ok for my thesis work????????
i'm working on xilinx environment.................
kindly gv ur valuable suggestions...............
Plz its urgenttttttttttttttttt.
reply as soon as possible
i'll be Thankful to you

hi
i am also doing same project.i would like to get help regarding coding.
can u upload these codes
thank you
 

deepikas

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hello!
i'm doing my thesis on comparison of multipliers. nd i'm over wid the codes of booth, wallace and booth encoded wallace tree multiplier and calculated their delay nd the delay comes out is least for booth encoded wallace tree multiplier and for the multiplication of two 8-bit signed numbers. nd the delay is 15.619ns nd the max. speed of operation for this is 64.18MHz. will u suggest me any other option for comparing these multipliers. or it 'll be ok for my thesis work????????
i'm working on xilinx environment.................
kindly gv ur valuable suggestions...............
Plz its urgenttttttttttttttttt.
reply as soon as possible
i'll be Thankful to you

hii samiksha ..myself deepika..
pls do me a favour..i need to generate codes for modified booth algorithm.pls send me if u can,,i really need earlier.nd pls rply me as early as posible.then i send u my email id
 

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