Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
if in any system design, a slave has a memory value of suppose 32bits(for example) and there is a transfer data of 64 bit suppose, then the master uses a wrapping burst inorder not to cross the 32 bit bounday,
i.e if it starts with 8 bit beat transfer 0,8, 16, 24, here it wraps to the earlier stage as there is no more memory left higher than 31 bits.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
