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The procedure of pll design

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Full Member level 2
Jan 18, 2005
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Hi, everyone. I want to design a PLL, and never have designed it before. Could you tell me what the procedure of pll design? Is it firstly caculate each blocks' spec, phase noise, bandwidth, Kvco and so on, then do each block design?
Thanks you very much!

You can design a synthesizer using ADF4153 PLL chip.....

Have a look at the details of ADF4153 here:
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There is simPLL application using which you can design your loop filter from this software, you will also get all the circuit parameters you mentioned:
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Thanks. But is seems a tool to select the product. Does it can caclulate the spec and do simulation? thanks!

But is seems a tool to select the product. Does it can caclulate the spec and do simulation?

Yes it can initially you will select a PLL chip and you can do simulation as well.

It will be very helpful to you.

Similar type of simulator is also present in National semiconductor for their PL chips.

ok, thanks a lot

Before starting your design, you must understand PLL design spec for your specific application.
Then you select suitable structure-> have behavior model simulation-> specify block spec-> design block circuit->run corner simulation->Build the top-level->Run top-level simulation->
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Just FYI.

For your PLL development and evaluation.
"Boosting PLL Design Efficiency From free-running VCO characterizations to closed-loop PLL evaluations"
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Here's the product web-site that introduced on above application note.
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