the problem of ring oscillator

[yangchan135692]

if i ring oscillator has many stages,for example 32. when the vdd=1.2V power up ,i find at the 0.6V the clk0-clk16 is work.,but it can't control the clk17-clk31 because the delay is too long.so the clk17-clk31 is work at an another frequency.this will keep until the vdd ok.so the frequency is high than my design.
how can i solve this problem?

 

[dick_freebird]

You never want a non-prime number of stages because those allow "M*N" cycles to travel around the ring in a stable sequence.

 

[yangchan135692]

You never want a non-prime number of stages because those allow "M*N" cycles to travel around the ring in a stable sequence.

Thank you for your answer.Does that mean i can't control the frequency of the ring oscillator. The only way is to reduce the stage and two stage is the best?

--- Updated Mar 1, 2023 ---

You never want a non-prime number of stages because those allow "M*N" cycles to travel around the ring in a stable sequence.

if i breaks the loop of the ring socillator until the vdd power up ,whether it can be solved.
but the delay cell is inconsistent.

 

[BradtheRad]

I made numerous simulations of ring oscillators (chasers, sequencers). More than one topology.

3 stages: easy to work with. Simple to start operating. Orderly sequencing.

4 stages or more: Usually lapse into a faulty mode. Not always possible to recover desired operation.

I found a few tricks that help obtain proper startup and orderly sequencing.

* Ensure all devices begin at high or low state, by connecting each input to a fixed voltage via high-ohm resistor. The voltage might be a supply rail, or a middle value close to the threshold where the device changes state.

* Install an oddball gate in the loop. Example, if all your devices are AND gates, then put in one invert-gate.
If all your devices are invert-gates, then put in a non-inverting buffer.

* Install a time delay between each stage by adding an RC combination.

 

[yangchan135692]

I made numerous simulations of ring oscillators (chasers, sequencers). More than one topology.

3 stages: easy to work with. Simple to start operating. Orderly sequencing.

4 stages or more: Usually lapse into a faulty mode. Not always possible to recover desired operation.

I found a few tricks that help obtain proper startup and orderly sequencing.

* Ensure all devices begin at high or low state, by connecting each input to a fixed voltage via high-ohm resistor. The voltage might be a supply rail, or a middle value close to the threshold where the device changes state.

* Install an oddball gate in the loop. Example, if all your devices are AND gates, then put in one invert-gate.
If all your devices are invert-gates, then put in a non-inverting buffer.

* Install a time delay between each stage by adding an RC combination.

thank you for your answer and simulation very much.
I add the initial conditon for each node ,it will work normally.

See the article "A startup circuit for even-stage differential ring oscillators "

But the first stage is work with very large current,because it is negitive feedback. Especially the pmos is large,my initial nmos should be large too.