The internal logic of the FFT when coding in Verilog

[rajsrikanth]

can any one help me to implement the fft logic in verilog and iwant to know the internal logic of the fft that is occuring while coding. like while implementing the loop for butterfly logic how do we consider the negetive sign while operation. and subtract with other number

 

[mmoctar]

Re: help about fft

try to use fft in ip core it is more easy cause I have look for fft code but all I have don't work....

 

[damn]

Re: help about fft

use 2's complement addition

 

[rsrinivas]

Re: help about fft

try to use fft in ip core it is more easy cause I have look for fft code but all I have don't work....

yes the ip core has a good fft module.
if u code it it may not be as efficient as the ip core one in trms of speed and logic utilization.

 

[kalyansumankv]

help about fft

I think the butterfly multiplication is done using a small additon and mult code ,and the negative sign depnds on the FFT implementation and how many point FFT you tring to implement..,
usually these negative values depends on the sine and cos values

 

[mmoctar]

Re: help about fft

I get it in DoD vhdl handbook but it has some problem, if someone can help me to resolve it I think many people can use it.
-- Package File Template

--

-- Purpose: This package defines supplemental types, subtypes,

-- constants, and functions ug175

-- Virginia polyetchnic institute and state university



library IEEE;

use IEEE.STD_LOGIC_1164.all;

--use IEEE.math_complex.all;

use IEEE.math_real.all;

--use IEEE.std_logic_arith.all;

Package dsp_prims_pkg is



type arr1_re_typ is array (positive range <>) of real;

type arr0_re_typ is array (natural range <>) of real;

type complx_typ is record

re: real;

imag: real;

end record;

type arr1_complx_typ is array(positive range <>) of complx_typ;

type tod1_complx_typ is array(positive range <>, positive range <>) of complx_typ;



procedure fft_sig

(signal data: in arr1_complx_typ;

signal isi: in integer;

signal fft_out: out arr1_complx_typ);



procedure fft_var

(variable data: inout tod1_complx_typ;

variable isign: in integer;

variable fft_out : out tod1_complx_typ);

end dsp_prims_pkg;

------------------------------------------------------



package body dsp_prims_pkg is

constant math_pi: real := 3.14159_26535_89793_23846;

constant half_pi: real := math_pi/2.0;



function "*" (x: complx_typ;

y: complx_typ)

return complx_typ is

begin

return (x.re * y.re - x.imag * y.imag,

x.imag * y.re + x.re * y.imag);

end "*";



function "+" (x: complx_typ;

y: complx_typ)

return complx_typ is

begin

return (x.re + y.re, x.imag + y.imag);

end "+";



function "-" (x: complx_typ;

y: complx_typ)

return complx_typ is

begin

return (x.re - y.re, x.imag + y.imag);

end "-";



procedure fft_sig

( signal data: in arr1_complx_typ;

signal isi: in integer;

signal fft_out: out arr1_complx_typ) is



variable w: complx_typ;

variable temp: complx_typ;

variable data1: arr1_complx_typ (1 to data'high);

variable mmax: integer := 1;

variable istep: integer;

variable x: integer;

variable j: integer:=1;

variable m: integer;

variable theta: real;



begin

data1 := data;

fft1: for i in data1'range loop

if (i <j) then

temp := data1(j);

data1(i) := temp;

end if;

m := data1'high/2;

fft2: while (j > m) loop

j := j-m;

m := ((m+1)/2);

end loop fft2;

j := j + m;

end loop fft1;

fft3: while (mmax < data1'high) loop

istep := 2 * mmax;

fft4: for m in 1 to mmax loop

theta := math_pi* real(isi*(m - 1)) / real (mmax);

w := (cos(theta), sin (theta));

x := m;

fft5: while (x <= data'high) loop

j := x + mmax;

temp := w* data1(j);

data1(j) := data(x) - temp;

data1(x) := data(x) + temp;

x := x + istep;

end loop fft5;

end loop fft4;

mmax := istep;

end loop fft3;

if (isi >= 0) then

fft6: for i in data1'range loop

data1(i) := data1(i) / data1'high;

end loop fft6;

end if;

fft_out <= data1;

end fft_sig;

end dsp_prims_pkg;