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The bugs in Xilinx EDK 6.1 version

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jjljajp

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Hi, Anybody has experience with Xilinx EDK 6.1. There are lot of bugs. It is not easy to strat with an example. There is no speed grade selection for Spartan IIE 600. When sysnthesis it gives error 1. There is no way to find out what could be the error.

With Regards,
NJ
 

error:mdt - invalid target speed

Have you applied SP1 and SP2?. You should have received the EDK 6.2 upgrade CD by now, but be aware it requires ISE 6.2

Git
 

xilinx xst invalid target speed

Yes. I did apply all the service packs. What is the point in gerting more and more new versions if a current versions does not work?. Nobody can upgrade to a new version very often even the newer version is for free. I just do not want to try with all the version just to know, if they have any bugs.

NJ
 

compiling without xilinx edk installed

Sounds like you are not trying to make it work. The purpose of upgrading to 6.2 is because, besides the new features, it fixes a lot of bugs. What bugs are bothering you?. I'm not having any problems, with 6.1SP2 or 6.2

Git
 

how to work on xilinx 6.1

Thank you for your response. I am using Dev. Kit from Memc with Spartan IIE with 600,000 gates deivce. I just tried to compile a demo program from Memec examples. I got the error make:***[implementation/system.ngc] error 1. But I could compile, if I choose the device with 300,000 gates. The speed grade pull down menu for 600 device is empty. Can you help me what could be the probelm?

With Regards,
NJ
 

xilinx invalid target speed

I recall getting a very similar error (maybe even the same one) with EDK 3.1. I could not figure out what the problem was so I installed ISE+EDK on a different computer and it worked with no problems. I'd suggest you try the same thing and see what happens.

- Jayson
 

Re: Xilinx EDK 6.1 Bugs

raylay said:
I follow the EDK6.1 tutor.when i generate netlist, the error come out,
----------------------------------------------------------------

(Console Log)
Project Opened.
Command bash -c "cd /xygdrive/e/temp/XilinxReferenceSystems/plb_ssp3_v1_00_a/; make -f system.make netlist; exit;" Started...
*********************************************
Creating system netlist for hardware specification..
*********************************************
platgen -p xc2vp7fg456-6 -lang vhdl -st xst system.mhs
Release 6.1i - platgen EDK_G.12
Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved.
ERROR:MDT - Invalid target speed '-6'
ERROR:MDT - platgen failed with errors!
make: *** [implementation/system.ngc] Error 2
Done.

-------------------------------------------------------------------------
but I couldn't modify target speed option!

Thank you for your advise!
 

Re: Xilinx EDK 6.1 Bugs

Uninstall ISE & EDK. Delete(Remove) the directories. Re-install ISE & EDK. The problem will be solved.

NJ
 

Re: Xilinx EDK 6.1 Bugs

jjljajp said:
Uninstall ISE & EDK. Delete(Remove) the directories. Re-install ISE & EDK. The problem will be solved.

NJ

...looks like the same way of fixing M!cr0$0ft products :lol:
Anyway, has anybody EDK 6.1 servicepacks to share?
Thanks,
Maddin
 

Re: Xilinx EDK 6.1 Bugs

can be downloaded from Xilinix web site.
NJ
 

Re: Xilinx EDK 6.1 Bugs

jjljajp said:
can be downloaded from Xilinix web site.
NJ

jjljajp, that's true, but unfortunately you require an account to get access to the files :evil:
Is there any alternative source?
Thanks,
Maddin
 

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