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The best software integrated development tool for Xilinx FPGA

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absm

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Please suggest a best software integrated development tool for xilinx FPGA's
Thank you!
 

deepa

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Re: xilinx FPGA

to start with Xilinx ISE 5.1 would do..if u have a chance try the advanced features of 7.1
 

echo47

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xilinx FPGA

I'm not sure what you mean by "best".

I suggest starting with Xilinx ISE 8.1i. It includes all the tools you need. The WebPACK version is free, but it supports only the smaller FPGA devices. The full-featured Foundation version costs about $2500 US.

You can use the HDL compiler included with ISE. It's called XST, and it works pretty well, but some folks prefer Synplicity Synplify Pro. It's expensive, around $19000 US.

ISE includes ModelSim XE, a light "Xilinx Edition" HDL simulator. The full-featured ModelSim SE is much faster, but costs around $20000 US. ISE also includes its own built-in "ISE Simulator", but the previous version was simply awful, and I haven't tried the 8.1i version.
 

uglyduck

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Re: xilinx FPGA

absm said:
Please suggest a best software integrated development tool for xilinx FPGA's
Thank you!
Here's the best: Xilinx ISE WebPack v.7.1.i plus service pack 4 for synthesis, programming etc. Stable, fast... best. Available for free from Xilinx website. For simulation use ModelSim XE that is also available for free from the Xilinx website. There is a newer version of ISE - WebPack 8.1i, but it has many many many... bugs, even in the service pack 1 that they have just released. So work on WebPack 7.1i + SP4 and have fun.
 

VirtualThread

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Re: xilinx FPGA

It is better to use the latest tool from the same vendor. I would recommned using Xilinx ISE 8.1 but don't use its Service Pack1 as it has some bugs.
 

echo47

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I haven't run into any serious problems with 8.1i or SP1. What's broken?

I can't use 7.1i (any service pack) with my XC2V6000 projects because the 7.1i timing-driven mapper assumes the wrong multiplier speed, and aborts with "impossible to meet timing" message. The speed bug existed in 6.3i too, but that mapper gave a semi-harmless warning (instead of aborting) and then proceeded to PAR which worked fine. Bug finally fixed in 8.1i.
 

uglyduck

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Re: xilinx FPGA

VirtualThread said:
It is better to use the latest tool from the same vendor. I would recommned using Xilinx ISE 8.1 but don't use its Service Pack1 as it has some bugs.
Have you tried to run latest version ? I have. I will not list all the bugs here but... this software is just not working:!: I have tried very simple designs and... it is odiously to work with this software (i mean the latest version). And why do you think they have released SP1 so fast - just immediately after the base version ?
I like WebPack. It is very good software and it is very easy to work with it. In general. In particular - I hope that Xilinx will fix their bugs very soon. Till that moment I recommend - just use the old stable version. (I will not comment support for larger devices, but for most of the designs the old version works just perfectly).
And finally: all this things I said are my personal point of view. It's your choise to decide what to do.

Good luck
 

echo47

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xilinx FPGA

uglyduck, the 8.1i problems you see, are they in the Project Manager GUI, or in the compiler/mapper/par tools? I don't use Project Manager, so I wouldn't see any bugs there.

Xilinx usually releases a service pack very soon after they ship the CD-ROMs. It probably includes bugs found during manufacture of the discs.

I'm having much better luck with early 8.1i than I did with early 7.1i. Just in case, I keep four versions installed: 4.2i, 6.3i, 7.1i, and 8.1i. I switch between them by changing one environment variable.
 

samcheetah

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xilinx FPGA

why dont you use project manager? and how do you synthesize, map, par and implement your design
 

echo47

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I despise interactive interfaces in development tools. I run ISE from a command-line makefile that runs xst, ngc2edif, ngdbuild, map, trce, par, and then bitgen. That gives me compact control of all the steps, and I don't have to deal with any Project Manager quirks. To begin a new project, I write the HDL and UCF files, modify the FPGA part number, and type "make". If I need any special processing along the way (such as merging the bitstream into a larger project), I simply add stuff to the makefile. The makefile works with all ISE versions since about 6.1i.

In case you are curious about "make":
https://www.gnu.org/software/make/manual/make.html
 

uglyduck

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Re: xilinx FPGA

@echo47
Normally, most of the designer, especially the beginners, use Project Navigator. For me, personally, use of command prompt makes no sense. Maybe I'm not that much familiar with the product. But anyway. The man just asked for best software IDE. I suggested he is not a higl level guru in the field and I have proposed a stable version although there are many good things in the latest one. For the case: I use Project Navigator for every my project and I think there are a lot of things to fix. That's all.

Cheers :)
 

echo47

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I was simply answering samcheetah's question. ;)
Yes, Project Navigator is good for beginners and some full-time users. I used it for a few days while learning ISE.
 

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