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Testing of oscillating circuit on VNA

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gecky

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Hi,

I'm trying to test an active circuit (FET with feedback) on the VNA. However, the circuit starts to oscillate before I can reach the desired FET biasing and the warning msg pops up on the VNA. Seems like the spikes due to the oscillation is too much for the VNA to handle and I should not proceed to advoid spoiling the equipment.

The feedback does causes the circuit to be unstable since it is part of a DRO and my intention is to measure the S11 and S22 to verify simulation results.

Please advice. Thanks!
 

for Ampli close to oscillation, is very difficult to measure spar.
Often the worse isolation inside the test set may cause oscillation.
You may try this:

1) Place an adeguate attenuator pad just "before" your ref plane. i.e. 6 or 10 dB.
2) Set a very low power level i.e -40 dBm or so

Of course using a pad will decrease the directivity, you shoul'd accept it.
 

Generally you can't test oscillatiion circuit using VNA.
you can check with spectrum analysiser.
 

Following some indicators you can see that oscillations using the VNA. For example if you see a positive S11 or S22, definitely at that frequencies the amplifier is potential unstable.
Also on S21 shape if you see some sharp edges there is a potential oscillation. If you change the bias and that edges are moving in frequency this is the oscillation. You have to double check that frequencies using the Spectrum Analyzer, with and without signal at the input, at different biases
 

In an unstable circuit such as unstable amplifier,oscillators etc. the S-Parameters are NOT valid anymore because of they're in nonlinear regime.Therefore measurements of s-parameters are NOT possible with VNA.
To overcome this problem, first of all should get it into stable region by applying negative feedback or other techniques.
 

Thanks everyone!

I'll try with a larger attenuation the next time I test the circuit :)

The idea of seeing the S11 is such that I can tune the length of a MLOC at the source to acheive the "unstability" I need at the LO freq. I could then place my DR next to the ML at the gate and test for LO using the SA. I did not expect the circuit to osc at some other freq (prob due to the feedback) when I started out....I just expected to see S11>1 :)
 

for BigBoss
If you read carefully my post you will see that I said: S-parameters are ONLY INDICATORS where the amplifier is potential unstable.
How can you know, when you test for the first time an amplifier, if will oscillate or not? (to use or not the VNA).
S-parameters will give you a quick indication, and after this you can use any kind of test equipment you want.
But with a little experience, using the VNA, you can guess even where the oscillation happened.
 

gecky,
Why do you have a feedback, didn't yoay want the DR for a feedback ?
If the oscillator is a series feedback (DR is located in the gate or base) then S11 at the gate(base) should give negative resistance and it is ligal and correct. For correct design it shouldn't oscillate without the DR!!!
If the DR comes to be a parallel feedback then I don't see any reson for oscillation without the DR??
Could you tell us more please about the circuit?
 

Hi DJ,

I'm using the series feedback topology now. Since the FET is inherently stable, I added a MLOC at the Source. So, on its own, the FET S11>1 and there is negative resistance. This S11 is what i wish to verify on the VNA. So if tested S11>1, I can go on and put my DR and test for the LO freq with the SA. :)

The VNA test is as follows:
1. apply Vg=-1V and then Vd=3v
2. tune Vg down to -0.45v (the required Vg)
3. capture S11 etc.

But before i can reach -0.45V, the FET osc! I can only go down to ~-0.8V.

One query:
by adding a MLOC at the source, I was actually able to tune |S11| in ADS to 3. Means I was able to centre the peak of the S11 (and also S21) at the desired freq of 6GHz by adjusating the MLOC. Is this too much?

Thanks!
 

In simulation you can tune the length of the MLOC while monitoring the S11 peak.

But practically I don't think you can measure the S11 to tune the MLOC length.

Normally the oscillation will get maximum amplitude at the S11 peak. Then you can tune the length while moving the resonator.
 

Hi!

I have given up trying to tune the MLOC while connected to the VNA for fear of spoil this freaking expensive piece of test equipment :)

Now I tune the MLOC with the DRO plugged into the SA...seem to work....

But as a newbie, I'd like to know how tuning is done to acheive the high level of accuracy reported... I scrap my MLOC off to tune my DRO... very primitive... Please enlighten me how you guys do it! :)

Many thanks!
 

Gecky,

Got an application note from SiGe. Seems they tested S11.

I am still on designing step. No chance to test yet.

soon
 

Thanks Soon, will take a look at it :)

Gd Luck in your design!
 

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