Test set size estimation of path-delay fault from ATPG (Synopsys TetraMax)

[Jaeyoungpark]

Hi All,

I am using Synopsys TetraMax to generate test patterns for path-delay fault. My circuit/RTL is a multi-core system and the size is very large.

My question is how to estimate roughly the number of test patterns/test set size from ATPG tool before I will run ATPG.

Fortunately, I can analyze near-critical paths before ATPG run, and ATPG can read a set of paths as inputs.

How many test patterns can be from one near-critical path? If this question might not be right, how many test patterns can be on n input circuit? 2^n x 2^n would be possible in the worst case.

Best,

Jaeyoung

 

[maulin sheth]

Hello,

As per my opinion, I don't think that there is direct equation for test set size estimation. Nowadays, its depends on the Complexity of the design, How the controllability and observability is available in your design critical paths, what are the timing constraints that we give etc.
I am also interested if there is any equation is available for estimation.

Regards,
Maulin