Technology affect on DFT Faults/Fault Models

[raviram80]

Hi All,

I would like to know as the Technology decreases from 90 -> 65 -> 45 what are the possible faults that could be more prominent in lower technologies.

Please let me know,

Thanks

 

[jpvSoccer]

Hi, here is an interesting article that makes a case for 90nm and below where pseudorandom BIST will provide improved defect detection over ATPG/AT-SPEED-ATPG.

SOCcentral: The New DFT Reality at 90nm (SOCcentral 13086)

 

[Nanda San]

small delay defects are prominent on lower tech nodes.

 

[ranger01]

As Nandan rightly said the Path delay and transition delay faults become prominent at lower nodes also the IDDQ testing looses its importance as it'll be difficult to differentiate between the leakage current and the short circuit current.