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TCL-CIP in simvision not modelsim

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coshy

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Hi,

when I checked about verification environment the RTL, I just came across the TCL-CIP method.
But I can't get any more information, I've just found this article

**broken link removed**

So, I want to know is there any reference to make these kind of tcl-cip verification environment, any book or any reference site, any reference things.

Actually, I think tcl-cip method is for modelsim not simvision, Am I right?
 

This sounds like a bunch of scripts put together by a single engineer, not a methodology at all. It's very simplistic: adding a layer of TCL to control testbenches. One could argue you could get the same or better with systemverilog. One could also argue the TCL layer was always there.

Personally, if you are trying to learn about verification, I'd say you are looking into the wrong thing.
 

Actually in my side, that seems not simple. Can you introduce me how do I make and use that tcl? Layer?
 

Actually in my side, that seems not simple. Can you introduce me how do I make and use that tcl? Layer?

You would have to read the documentation that comes with your preferred simulator and see what it can do. You would also have to learn some TCL basics as how to use variables, how to write loops, ifs, etc. Lot of work for very little.
 

You would have to read the documentation that comes with your preferred simulator and see what it can do. You would also have to learn some TCL basics as how to use variables, how to write loops, ifs, etc. Lot of work for very little.

If I got a simple module like this

module ex3(a,b,c);
input [1:0] a;
input [1:0] b;
output [1:0] c;

wire [1:0] c;
assign c = a+b;
endmodule



and I want to invoke this module into a simple TCL like this.
proc test1{} {
ex3.a = 1
ex3.b = 2
}

what If I can make like this, can you let me know how do make sure the ex1's test?
 

If I got a simple module like this

module ex3(a,b,c);
input [1:0] a;
input [1:0] b;
output [1:0] c;

wire [1:0] c;
assign c = a+b;
endmodule



and I want to invoke this module into a simple TCL like this.
proc test1{} {
ex3.a = 1
ex3.b = 2
}

what If I can make like this, can you let me know how do make sure the ex1's test?

please don't use TCL for this. use a testbench, as previously suggested.
 

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