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Tanner EDA: digital design flow (from VERILOG to layout) ?

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olifant

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Hello,

I am using the Tanner EDA tools with the AMS 0.35 PDK, and I was wondering how I could synthesize VERILOG code into a layout in Tanner L EDIT (or an EDIF file that can be imported using the standard place and route tool of Tanner). The Tanner website (L-Edit - General - How does a digital design flow fit into L-Edit?) mentions the use of Mentor's Leonardo Spectrum (although I need a synthesizing library), and I was wondering if there are other tools (except for Leonardo Spectrum, mentioned by Tanner) or methods for synthesizing VERILOG code into a Tanner layout ?

I am not familiar with a digital design flow, so i would appreciate it if someone could break down the steps for me ?

Thanks for your help !
 

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