T/25-period clock generation starting from T-period clock

[jhcena1985]

Hi,

I have to generate a T/25-period and 25% duty cycle clock starting from a T-period and 50% duty cycle clock. In particular, I have an input clock with period of 2ns and I must have a 50ns period clock as output. I can't use more then 10 FF so a series of 25 FF doesn't work. I tried to design such design as a Finite State Machine but actually this circuit has no input. Anyone could help me? Thanks

 

[lostinxlation]

25% of 50ns is 12.5ns. Since the original clock is 2ns and 50% duty, you have clock edges only at 1ns increment positions which makes it impossible to have a clock edge at 12.5ns to make it 25% duty.

 

[jhcena1985]

Thank you for your answer. You are completely right! Infact I committed a mistake! The duty cycle is 40% (2/5 and not 25% as I said). For a better comprension here in addition an image of what I would like to do using at the worst case 10 FF.

 

[lostinxlation]

Have a 5 bit counter and toggle the output at 10th and 25th cycle.
you need 6 flops(not 5 in case you are wondering) to make it a good clock.

 

[jhcena1985]

Let's call the binary output b0 b1 b2 b3 b4 (MSB -> LSB). You mean that you want toggle all the binary word or just b0? In the first case when I reach the 10th cycle I force the entire binary output word to 10000. In the second case I cant see the solution.

 

[lostinxlation]

You only have one bit output.you just need to count the number of 2ns pulse and flip the output signal at the 10th and 25th pulse, and reset the counter at 25. That makes one cycle clock of 50ns and 40% duty. Repeat this process.