system generator vs. simulink HDL coder

[salma ali bakr]

simulink hdl coder download

what's the difference between system generator and simulink HDL coder...?
why should i use one and not the other?
do i see HDL code as an output of both or just .bit files ready for download on FPGA?

thanks in advance,
salma

 

[nxtech]

system generator vs. simulink hdl coder

System generator generates generates parameterizable cores while Simulink HDL Coder generates synthesizable Verilog and VHDL code.

E

 

[salma ali bakr]

simulink hdl coder system generator

thanks a lot

but what does parameterizable core mean..? are you referring to the leverage of core generator to generate optimized blocks...?

so, there's no HDL generated from sysgen, it's only either a netlist or a bit file, right?

 

[khouly]

simulink hdl coder - download

system generator is a xilinx product , which is optimized to use xilinx FPGAs , but HDL coder generates verilog and VHDL codes generally without the dependencies on the certain FPGA technology

another thing u can use the output of the HDL coder in ASIC technology

khouly

 

[salma ali bakr]

aha, thanks mohamed...

so if my design is going to be implemented on FPGA then i should just use system generator...but i won't get an HDL file, it would be either the netlist or the bit file....but by HDL coder, synthesizable code is generated which can then be altered in any way i want, synthesized and implemented on FPGA or ASIC...

 

[khouly]

not any FPGA , only xilinx FPGA

the HDL coder , will generate HDL code , then u can synthize it for any FPGA or ASIC

Khouly