[Synthesis] What command/flow should be used for cloning cells/paths?

[ivlsi]

Hi all,

One of the techniques to fix the timing is cloning the cells on the violated paths. How practically should it be done? What commands should be used?

Thank you

 

[englishdogg]

I am not sure if I understand your point on cloning towards timing
Usually it is done towards High Fanout fixing.. is this what you meant .. pls elaborate

 

[ivlsi]

Yes, I meant cloning towards High FanOut fixing. Fixing FanOut cells (cloning them) should also fix timing, am I wrong?

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what commands / constraints should I use in order to reduce a number of high-fanout cells? Are there special commands for cells cloning?

 

[englishdogg]

What product are you using and at what stage are you requesting this to be done

 

[ivlsi]

What product are you using

Design Compiler from Synopsys

what stage are you requesting this to be done

Timing Optimization

 

[englishdogg]

to report HFO in DC you can use "all_high_fanout" to enable optimization in the SDC file you can set the constraint "set_max_fanout"
I hope i understood your question and was able to answer the same