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Synthesis tool does not use ICG standard cell - timing arcs problem

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shlooky

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Hi all!

I am trying to synthesize RTL code containing clock gating in Cadence Genus. When I read in the MMMC file I get the following warning about the ICG standard cell.
Warning : Detected both combinational and sequential timing arcs in a library cell. This might prevent the tool from using this cell for technology mapping. The tool will treat it as unusable. [LBR-76]
: The arc 'CK_E_Ha0' between pins 'CK' and 'E' in libcell 'GCKETHHD' is a sequential timing arc.

The tools does not use the cell, indeed.
I can get clock gating implemented in discreet form by setting "set_db / .lp_insert_discrete_clock_gating_logic 1", but I would like to use ICG instead.
I tried flipping the "dont_use" or "dont_tocuh" flags ("set_db lib_cells .dont_use 0"), but without success...

How do I disable the library "timing arcs check", or somehow get the tool to use the ICG standard cell?
Does this mean that the definition in the library is incorrect?

The RTL code is ok. When I used libs of a different technology, ICG cell gets implemented correctly.

Thank you guys!
Shlooky
 

Hi all!

I am trying to synthesize RTL code containing clock gating in Cadence Genus. When I read in the MMMC file I get the following warning about the ICG standard cell.


The tools does not use the cell, indeed.
I can get clock gating implemented in discreet form by setting "set_db / .lp_insert_discrete_clock_gating_logic 1", but I would like to use ICG instead.
I tried flipping the "dont_use" or "dont_tocuh" flags ("set_db lib_cells .dont_use 0"), but without success...

How do I disable the library "timing arcs check", or somehow get the tool to use the ICG standard cell?
Does this mean that the definition in the library is incorrect?

The RTL code is ok. When I used libs of a different technology, ICG cell gets implemented correctly.

Thank you guys!
Shlooky

I am 90% sure innovus has no such limitation and will pick up the cell later on on the flow. Give it a try.
 

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