[Synthesis Interview] Please share questions

[ivlsi]

Hi All,

Please share interview questions on Synthesis topic.

Please share all questions - about cells, libraries, constraints, etc.

Thank you!

 

[kumar_eee]

Few Questions that I came across.
1. How do you qualify your SDC?
2. What is meant by Time-Borrowing?
3. How do you choose the clock-gating fanout value?
4. Will you over-constraint your design while doing synthesis?

 

[wtr]

I hope we will get the expected answers to these questions.
Also, it's always good to throw in a question about clock domain crossing.

 

[kumar_eee]

What is menat by designware components?

 

[sharath666]

Synopsys IPs and their pieces of code are known as designware components.