Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Few Questions that I came across.
1. How do you qualify your SDC?
2. What is meant by Time-Borrowing?
3. How do you choose the clock-gating fanout value?
4. Will you over-constraint your design while doing synthesis?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.