[SOLVED] Synthesis error while using Synopsys Designware

[rakeshk.r]

Hi,

I am synthesizing a vhdl design integrated with Synopsys Designware given in this link https://www.synopsys.com/dw/ipdir.php?c=DW_sqrt. I have created a component by copy & pasting the same code as provided in the option "Direct Instantiation in VHDL" provided in that link. When I synthesis my top level component named "top_unit" using the design compiler, I get the following error:

Error: Cannot find a valid implementation for module 'DW_sqrt'. (SYNH-14)
Error processing design 'top_unit_1'.
Error: Compile has abnormally terminated. (OPT-100)

Here, "DW_sqrt" is instantiated inside the vhdl code provided by Synopsys. I don't know how to obtain this file named 'DW_sqrt'. I have already added module synopsys/dc2014.09 and I am wondering if I need some other module from synopsys to be added to fix this error ? Thank you.

 

[dpaul]

I don't know how to obtain this file named 'DW_sqrt'. I have already added module synopsys/dc2014.09 and I am wondering if I need some other module from synopsys to be added to fix this error ?

In order to have the above you need to a Synopsys SolvNet account. The download all the DW IPs and install/extract them somewhere in you local path. Later point your files to make use of the 'DW_sqrt' module.

Ask you manager or the one who maintains the EDA tools for the Synopsys Site ID. Using that you can create a SolvNet login.

 

[rakeshk.r]

synthetic library was not set and after setting up that, my problem was fixed. However I will refer your answer if in case I had set synthetic library and still the problem exist. Thank you.