nagu guptha
Junior Member level 2
synthesies
Actually to use the same block iteratively we have used FOR loop in our coding to use a single instance iteratively.......but during synthesies for each instance a new component is being generated.....what should we use to iterate the same block on fpga......pls reply.
Actually to use the same block iteratively we have used FOR loop in our coding to use a single instance iteratively.......but during synthesies for each instance a new component is being generated.....what should we use to iterate the same block on fpga......pls reply.