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synthesies- what should we use to iterate same block on FPGA

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nagu guptha

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synthesies

Actually to use the same block iteratively we have used FOR loop in our coding to use a single instance iteratively.......but during synthesies for each instance a new component is being generated.....what should we use to iterate the same block on fpga......pls reply.
 

synthesies

you should feedback from the output to input. You should use control logic FSM (finite state machine) to do multiple iterations. But you can do without FSM as well. But you have to use certain signals to indicate if the iteration is done or not.
 

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