Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Syntax error found by spectre during AHDL compile.

Status
Not open for further replies.

Papiya_Akter

Newbie level 4
Joined
Dec 20, 2014
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
27
Dear all,
I am experiencing the following error problem.

/* Error found by spectre during AHDL compile.
ERROR (VACOMP-2259): "if<<--? ($param_given(AS))"
line 1917: syntax error.
ERROR (VACOMP-1814): Maximum allowable errors exceeded. Exiting AHDL
compilation....
*/

The model is-

/* Verilog-A definition of BSIM4 based on developed by UC Berkeley version 4.5
$RCSfile: bsim4.va,v $ $Revision: 1.5 $ $Date: 2008/01/15 01:51:00 $
*/

Can anyone please help me to solve this problem?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top