Switch Cap Array using Series Cap

[celebrevida]

I am in the middle of designing an 8-bit SAR-ADC using a switched cap DAC.

The most straightforward way is for the caps to be binary weighted and you would have a situation as follows:
128C, 64C, ..., C
for a total of 255 capacitors in total.

It seems I could reduce the number of caps significantly if I used caps in series:
8C, 4C, 2C, 1C, C/2, C/4, C/8, C/16
where C/2 means 2 caps i series, etc.
The end result is 8+4+...+8+16=45 capacitors in total.

Is there any issue with using caps in series like this?

Also would I need or want to precharge the middle nets to 0V and then let them float? Or is precharge not needed?

Thanks in advance!

 

[dick_freebird]

The big "art issue" may be accounting for stray C
(a shunt loss / error term). You put the explicit caps
in series but not the shunts. So the end-to-end C
will not be exactly 1/N the lonely C.

Easy to match shunt to shunt, everything's parallel
to the same place. Shunt to series, there's the
topology messing a bit.

 

[celebrevida]

The big "art issue" may be accounting for stray C
(a shunt loss / error term). You put the explicit caps
in series but not the shunts. So the end-to-end C
will not be exactly 1/N the lonely C.

Easy to match shunt to shunt, everything's parallel
to the same place. Shunt to series, there's the
topology messing a bit.

IIUC, the "internal nodes" in the caps that are in series cause mismatch as these nodes do not exist in the caps that are not in series.

In that case, perhaps a good compromise might be something like:
32C, 16C, ..., C, C/2, C/4 (total of 69 caps)
or even
64, 32C, ..., 2C, C, C/2 (total of 129 caps)
might be preferred.

Assuming that LPE would catch the stray internal node capacitance, I could see if 32C, 16C, ..., C, C/2, C/4 (total of 69 caps) is good enough.