tshankar501
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Can anyone guide me on how to do substrate analysis on sigma delta adc. I am not able to find papers which talks about both the substrate noise and sigma delta (both). Can anybody upload those papers which talks about both. I am using spectre and virtuoso for building my sigma delta and I am wanting to do substrate noise analysis on this adc.
If I had to produce a digital current injection using a chain of inverters on the bulk node and model all the transistors using a resistance for the p-epi layer and capacitance for the junction between the n-well and the p-epi (assuming a single node for p+bulk), Can I claim that I have done the substrate noise analysis just by using the above substrate model for each transistor, simulating it in the spectre and observing the change in the snr at the output.
If so, can anybody tell the typical values of the resistance of the p-epi and the capacitance between the n-well and the p-epi. Can anybody upload any example model file for the same. I dont have the model file regarding the substrate values.
If I had to produce a digital current injection using a chain of inverters on the bulk node and model all the transistors using a resistance for the p-epi layer and capacitance for the junction between the n-well and the p-epi (assuming a single node for p+bulk), Can I claim that I have done the substrate noise analysis just by using the above substrate model for each transistor, simulating it in the spectre and observing the change in the snr at the output.
If so, can anybody tell the typical values of the resistance of the p-epi and the capacitance between the n-well and the p-epi. Can anybody upload any example model file for the same. I dont have the model file regarding the substrate values.
