I've simulated the vertical parallel plate structure for VLSI capacitor using HFSS , but i need a program to get the S-parameters & from it it generates spice subcircuit consisting of R L C components like the one generated by sonnet .
Hi, you can make an optimization program using hspice, eldo or similar. Another solution is @PL@C, go to its website and look the Q&A page, there they talk about that functionality and they give an example