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Strange problem. (about comparator)

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Victory1981

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I met with a strange problem these days.
I used a LM311 to make a zero-cross detector,I found that when the frequency is high(say,40KHz), the rising edge of the TTL output is very neat(I adjusted the oscilloscope to 100ns/Div to look close to the rising edge), but when it comes to low frequency(say, 400Hz), the rising edge twittered badly, and 40Hz even worse.(although it looked nice when I adjusted the oscilloscope to 1ms/DIV or 250ms/DIV).
Why? I didn't connected digital circuit to the analogy part, just a simple zero-cross detector. I don't think it's noise...But I have no idea why it happened and how to slove the problem. I'm making a frequency measurer, so I need a nice rising edge.
Please help me. Thanks in advance.
 

Hi

These are wonderful devices but can give you headaches if not supplied with some hysteresis I have found.

Quoting Bob Pease at National Semiconductor:

"For faster comparators, such as the LM311, everything gets touchier, and the layout is more critical.........One special precaution with the LM311 is tying the trim pins together to prevent AC feedback from the output.....The LM311 data sheet in the National Semiconductor Linear Databook has carried a properset of advice and cautions since 1980 and I recommend this advice for all comparators"

Also remember that all comparators will have noise. According to Bob, "You may find that each comparator has an individual noise band. When a differential input enters this band slowly from either side, the output can get very noisy, sometimes rail to rail, because of amplified noise or oscillation"

Hope this give you some pointers!

E
 

Hi Victory1981,

I agree with E-design. I think the problem is the slow risetime of the
comperator input with low input frequencies. The solution is a hysteresis
of about 1-5%.

Bye
 

Thank you for your help. But ...

Thank you for your help.
I tried every method to solve the problem, including adding a hysteresis, but the result seems not as good as expected.
Should I solve it in the digital part of the circuit (say, delay the signal until it's stable.)? I'm now using VHDL to design the digital circuit, so this may be the most easy way to solve the problem. But, I still wonder, is there any method to make the rising edge neat when the signal changes slowly? Or it's impossible?
 

Make sure the input signal level is high enough. Some amplification before your comparator could help. Low level signals will cause a lot of problems near the zero point. This will increase the slope and reduce the time the input spends near the problem noise band area of the comparator, resulting in cleaner switching.

E
 

Just add hysteresis with one or two resistors, I am sure this works good. As far as I understand your problem it is better to solve this in an analog way instead of adding delays.
 

use cmos type comparitor its far more sensative and lots faster
lm311 isnt so hot a chip and suffers badly from any sort of psu ripple above 20mv
and simply add a resistor to the output and use several gates of a 74hc 04/7 or other buffer


other is too just use a few gates as above with the setup you have
to clean it up
you can also add a diode to one gate in the middle of the chain to gnd 1n4148 etc
this will give very clean trasitions
 

!!!MONKEY!!! said:
use cmos type comparitor its far more sensative and lots faster

?? Normally we trade speed for a lower power consumption using CMOS. Response times for the 311 are stated in nS where a typical data spec on a CMOS comparator is in uS.

E
 

I see this problem lots when testing comparators, here are my thoughts on the matter..

1) Hysteresis really is the best way to do it - try tying your output to a little resistor divider to gnd (10 Ohms). And take your inverting input from there.. When your input is below GND, output will be GND and resistor divider will have no current flowing.. Once it switches though, it will need to go a little farther past 0 to reset the circuit. This keeps most comparators snappy, although ANY COMPARATOR WITHOUT HYSTERESIS will have a region of oscillation.

2) Add a resistor to the output - 1k, 5k.. This will pull a little current out of the comparator output and reduce the location of the first pole in the comparator's frequency response.. This should help for slow-rising signals, but for very slow (1mV/sec) you will need a very low resistor and waste a lot of power.

3) If all you want is 0-cross, use a diode and a 1k pulldown. This will be ground when the signal is below 0, and high once you pass the diode turnon voltage - 0.3v for shottky. Can use this as the input to two inverters to give a sharp, noninverted output. But you will have a 0.3v offset. No big deal if all you want is timing info, as it happens at the same point every cycle - but if you need to turn something on at 0-cross, remember this cheap solution gives offset.

4) MAX912 uses bipolar or single supplies, has TTL output and only 7ns prop delay. Maybe try this instead - go to www.maxim-ic.com and request some free samples.
 

Thank you all.

Thank you for your help.
I never expected so many valuable answers.
I'm now busy preparing my final exams, so I have no time to try the methods you gave me. I will try them out after my final exams.

electronrancher:
Thank you for your suggestion.
In fact, I added a resistor to the output, and found that the noise was reduced before you gave me the suggestion. But I still don't understand, why adding a resistor to the output will reduce the noise. Can you explain it in detail?

Besides, once I used a current output DAC, and use a operational amplifier to convert the current to voltage. But I found the result was not as good as voltage output DAC. especially at low frequency! Then I added a resistor to the output of the op, the result is magically good! I don't know why, just a resistor, reduce most of the noise! (I tried putting a 0.1uF between the VCC and GND, it works,i.e. reduced the noise, but the result was not very good especially at low frequency).
Would you please tell me, why the resistor connected to output has such magic power?
You explained in your post, but I don't catch it... I hope you can explain it in detail. Thanks a million!
 

Yes! I myself used this trick many times before learning why it works, but had a lot of trial-and-error to get them right.

When a guy designs a comparator IC, he makes it very fast. So fast that it is able to accept signals it cannot even process in time! Since all transistors have a little switching speed, this will always be the case. Seems to be no problem, since faster is better.. But wait.

Now think of your input signal as a frequency - A fast rising signal may look like 500MHz. Give this to your comparator, and input may have switched back low again when output is still rising. This is no good, since you may get false triggers, or bounce on output. The chip designer adds a little cap inside the comparator that decides the upper limit with no jitter.

The reason this causes problems at SLOW signals is because you have no load on your output (i think). You tie output to a digital pin, which is very easy to charge up (R=infinity for CMOS gate). Now your RC constant is infinite and even the little noise from switching has a lot of influence - you see jitter and ringing since the comparator switches so fast and there is nowhere for that little wave to go inside the chip - R is infinite!

Add a small R to the output and now your RC goes way down - that little bouncing is easily sucked up by the resistor. Now when you toggle slowly the comparator is busy pushing current into the resistor and doesn't get confused by flipping states and the little noise it causes.

I think my explanation may be confusing - try this example. Trip point is 0v. Fast signal is at +0.1v one nanosecond, -0.1v next nanosecond. That's 200mV, and no comparator will get confused by 200mV!
But a slow signal may be 0.000001v one nanosecond, -0.0000001 the next nanosecond. Where to decide? What if we make 0.00002v internal noise when we switch? Now we are above again! We bounce around several times for slow signals if there is nowhere for that noise to go.
 

Hi ,electronrancher
I try to make the circuit as your advice,but when the input signal is low(say, 500hz) the result that the frequency meter make is not accurate,(say the input is 500.12,the output is 500.23),but if I put a capacitor(about0.1u)between the input,the output is stable only the last bit is floating.but the input signal can't rise high(when the capacitor is put),I don't konw why?
 

look at the input when you add a cap - i bet it rises slowly so your op-amp no longer sees a fast switch. You are now compensating the signal, not the op-amp.

I think that cap is too big! Do you even reach the switchover point? Try something 100x smaller - 1000p/1nf but put a 10k in the ground path of the cap. this time constant is just 1/RC or 10k*1e-9->1uS. Slows all signals down to 1MHz. Chose smaller resistors to get faster response

You could also try a cap between the output and your sense input - this will seem to multiply the cap size by the gain of the amp - probably 1,000,000 if it's a comparator. Again only pf range is what you want here. If too sensitive, add a 100k-10MEG in parallel with the cap to complete your little fast-pulse integrator.

This may bounce on the way down though - beware. what is your application? i think it's funny that you are mad at 100mHz errror where as victory could not get results!
 

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