surreyian
Member level 3

Hello all,
I'm trying to find the open loop gain and 3dB cutoff frequency of a simple 2 stage amplifier.
I have break the circuit (in ac analysis) at 2 different location to see if there is any difference in ac response. Both circuit are break in high impedance point. AC analysis Fig1 and Fig2 (please refer to attachment for the circuitry), give different 3dB frequency response, however their open loop is the same (it also matches my calculation)
In stb analysis Fig 3 and 4, the open loop gain and 3dB frequency is the same as AC analysis in Fig 2.
I would like to know what cause the big difference in 3dB frequency in Fig1 (f3dB=70KHz) and Fig2 (f3dB=674Hz). Hand calculation is 2KHZ, based on 1/2pie*C*R (rout of large stage PMOS) * gain of last stage. Is this correct? Is it common to have 3X difference on hand calculation and simulation result?
Please see attachment for 1) circuit and 2) gain and phase plot
Appreciate any help, u can give me on this topic.

I'm trying to find the open loop gain and 3dB cutoff frequency of a simple 2 stage amplifier.
I have break the circuit (in ac analysis) at 2 different location to see if there is any difference in ac response. Both circuit are break in high impedance point. AC analysis Fig1 and Fig2 (please refer to attachment for the circuitry), give different 3dB frequency response, however their open loop is the same (it also matches my calculation)
In stb analysis Fig 3 and 4, the open loop gain and 3dB frequency is the same as AC analysis in Fig 2.
I would like to know what cause the big difference in 3dB frequency in Fig1 (f3dB=70KHz) and Fig2 (f3dB=674Hz). Hand calculation is 2KHZ, based on 1/2pie*C*R (rout of large stage PMOS) * gain of last stage. Is this correct? Is it common to have 3X difference on hand calculation and simulation result?
Please see attachment for 1) circuit and 2) gain and phase plot
Appreciate any help, u can give me on this topic.

