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State Machine Coding Styles ??

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eng_msa_8_8

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hi to all :)

can any one help me
is there a classification of State Machine Coding Styles
as
clocked & registered & combinational

if there what they are?
else what are State Machine Coding Styles?

thanx
 

randyest

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I assume you want verilog not VHDL since oyu didn't specify.

Here's a free ESNUG paper from Cliff Cummings in 1998 that is still relevant and helpful:

http://www.sunburst-design.com/papers/CummingsSNUG1998SJ_FSM_rev1_1.pdf

One by Steve Golson at ESNUG in 1994 is also good:

http://www.trilobyte.com/pdf/golson_snug94.pdf

And one I haven't read yet from Boise University:

http://scholarworks.boisestate.edu/cgi/viewcontent.cgi?article=1019&context=electrical_facpubs

All are freely distributable. Hope they help.
 

amraldo

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Mealy and Moore state machines are most famous.
They can be encoded in 1 combinational process and 1 sequential process, or 2 sequential processes and 1 combinational process.
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Amr
 

amraldo

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There is a book called Verilog Synthesis Primer by Bahaskar, it explains state machines in Verilog and how they can be implemented withe examples and comparisons.
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Amr
 

amraldo

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Thats it. It is a nice book about synthesizable Verilog.
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Amr
 

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