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startup on bandgap reference

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leebluer

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I have some question about the startup on bandgap reference. I know that because of the exsitence of the zero-stablility we need a startup circuit on the bandgap. But I don't know why there would be a zero-stablility on the bandgap reference. could you give me some advice? :roll: :?
 

The circuitry independent of power supply voltage is because there are two
or more stability bias points.
When power supply voltage is zero,
both circuit bias points are stable, respectively at the time of the stability
after an injection. Therefore, the bias point (after a power supply voltage
injection) which adds and desires a start-up circuit is chosen.
 

Is it ture that only the circuit with stacked-structure has the zero-current state? or to say, if we use the amplifier to balance the voltage other than stacked current-mirror, we don't need a startup on the bandgap when the power supply is injected. (suppose the the amplifier has its own bias current which is not from the bandgap but another current reference) :?: :roll:
 

ESPRIT said:
The circuitry independent of power supply voltage is because there are two
or more stability bias points.
When power supply voltage is zero,
both circuit bias points are stable, respectively at the time of the stability
after an injection. Therefore, the bias point (after a power supply voltage
injection) which adds and desires a start-up circuit is chosen.
Hello,
You mean the circuit is stable when power supply is 0. Then if the power supply is 5 or 3.3, the circuit can obtain the stable bias points not the zero bias state. At that time, does the circuit need a start circuit yet?
 

There is always a positive feedback path in the control loop of the
bandgap. If you don't use startup circuit, then probably the circuit
will die away through the positive feedback.
 

Btrend said:
There is always a positive feedback path in the control loop of the
bandgap. If you don't use startup circuit, then probably the circuit
will die away through the positive feedback.

I have some confusion on your saying. there maybe are two feedback path in the bandgap, one is positive feedback and the other is negative feedback. but in the design, negative feedback should determine the character of the circuit, then how should the positive feedback affects the bandgap? Can you talk more about it? thanks :p
 

yes, there are two feedback pathes. one is positive and the other is negative.
the positive feedback will give a "continuous trial stimulus" to the loop,
because your bandgap has no "reference input", so finally the negative
feedback + positive feedback ( thought as a sweep generator ) will be
stable if and only if negative feedback take over positive feedback.

if you don't use startup circuit to inject a current to kick it, it probably
will be a zero state, or a stable 1.25v state. [/quote]
 

So, what's is the main difference in the structures that use opamp or stacked-current mirror to balance the voltage between the two-legs of bandgap?
 

Op-amp is used to imrove matching between two legs for Low power supplies <=1.8V ,where one cannot use stacked current mirror's .This will improve PSRR and results in better matching.
 

The main circuit is the PTAT core. It is enclosed into a regulation loop
which try to equalize the currents I1 and I2. The resulting current

IPTAT=I1=I2

is the PTAT current. The equations for the PTAT circuit is

I1*R+VT*ln(I1/(a*IS))=VT*ln(I2/IS), "a" emitter area ratio

the solution for I1=I2 is

IPTAT=I1=I2=VT*ln(a)/R

Issue1:
If the PTAT is built with bipolar and the regulation uses the PTAT as mirror
the mirror ratio coud drop below 1 instead being "a". So the PNP or PMOS used
to built the regulation loop failt to start up. So the startup circuit help
to bring up the current level above the critical current level.

Issue2:
If the PTAT is built with bipolar and the regulation drives the bases. The
collector currents are connected to resistors. The difference voltage between
the resistors are amplified to drive the bases. Then an input offset voltage
of these amplifier could stop startup. That is because the voltage gain
drops with the current level.

Issue3:
If the startup current is low the startup time is long because the dynamic
of the PTAT regulation loop depend on the current level.

Issue4:
If the bandgap voltage reach is final value the injection of the startup current
should switched off. So there should be a circuit so that switch off not too early
the injected current. Otherwise the PSRR is impacted.

Issue5:
Emitter resistance not very low found in modern processes should be taken into
account for dimensioning the final PTAT current. It also introduce mismatch between
the PTAT loop resistor and PTAT multiplier resistor. So the bandgap voltage depend
on emitter resistance.

Issue6:
The same applies for MOS PTAT driven in subthreshold because there is an remaining
source resistance and subthreshold does not have exact exponential behaviour.

Issue7:
Emitter areas and ratio should be high. Otherwise mismatch define bandgap tolerance.
LPNP tend to be better at low current density than VNPN.
 

Thanks for mady79's kindly reply. But the offset of the opamp greatly impact the performance of the bandgap, so for the topologies that uses opamp or stacked current mirror, which one will generally have larger offset?
 

Generally,one would go for stacked current mirror configuration if there is no power supply constraints .Op-amp offset is additional factor which would be added to the output.Lower the offset by high gain .Kindly clarify about the offset you are referring to in stacked current mirror .
 

The purpose of using opamp is to ensure equi-potential between two points in Bandgap reference, and high gain of the opamp cannot reduce the effect of offset. Similarily the use of stack current mirror is also make sure two points equi-potential (fixed by gate-source voltage of mirror), and mismatch in current mirror also leads to offset difference. Practically which kind of offset will be larger?
 

The two nodes which need to be constant are varying because the current are varying due to PMOS mismatches .The factor which contributes most is the supply dependence variation due to channel length modulations .To avoid the supply variations ,one would prefer stacked NMOS /PMOS cascode topologies .Even in case of low voltages one can use wide swing cascode current mirror's which have minimal supply dependent variations .
In Internal Opamp configuration,High gain of the opamp try to keep the two nodes at the same potential .But still have supply variations and mismatch in PMOS .Also there is an offset of the op-amp which gets amplified by resistor's ratio in addtion to the VBE mismatch .
So,I think the stacked current mirror takes the edge .In any case remember both of them are first order BGR's.

Hope this answer's your queries .
 

How can I make sure that once the bandgap enter the correct stable region, it will stay there forever?

How to define the simulations to check it?
 

Dear Mike,
Hve ramping supply. try with 2 different ramps, one very slow rampling rate and other very fast.
Use intial conditions, look at the outputs.
 

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