Standard deviation of the capacitance value

[Chinmaye]

Dear all,
I would like to know what is the maximum deviation of the capacitance values from its nominal values in MIM type, MOM, double poly and other types of capacitance. Where can i get this data from?

 

[dick_freebird]

Foundry WAT limits would tell you the range
of shippable product but the real distribution
would only be found in internal reports. In a
good foundry's PDK modeling / library docs
you might expect to find some model param
distributions and these, maybe relate to the
on-wafer feature distributions at some point
in time to some degree. Sometimes I have
seen model-vs-WAT distribution overlays
if the modeling folks are that through.

 

[timof]

There are two types of variations -

1. Microscopic, device-to-device variation, also called random mismatch.
2. Large-scale variations - chip-to-chip, wafer-to-wafer, and lot-to-lot, also called global variation.

Such information cannot be derived from "the first principles" - it comes from the measurements, from the fab / foundry.

Random mismatch is usually described by Pelgrom-type models, where one sigma (standard deviation) is described by a formula like sigma = A/sqrt(S), where A is a parameter that foundries derive form the measurements, and S is teh area of the device (the bigger the device in size, the smaller the random variation).

For global variations, the foundries usually provide some limits, that are, quite often, very conservative.

While the global variation can be very large - e.g. 15-20% or so, the random mismatch is much smaller (small fraction of a percent - but of course, dependent on the devcie size / area).