standard cell library

[vashistha]

How to decide the height of cells (layout) in standard cell library??

 

[erikl]

About 10..12 metal1 pitches (pitch = min. width + min. spacing)

 

[vashistha]

min. width=0.23
min. spacing=0.25
pitch = 0.48
height of standard cell= 4.8 to 5.76
is this correct?

 

[erikl]

... is this correct?

I think so. 5µm is the cell height of many 0.18µm Std Cell Libs.

 

[vashistha]

Thanks erikl...Can u please suggest me some books or pdfs to understand the common centroid layout technique

 

[erikl]

Alan Hastings' book "The Art of Analog Layout" explains it, also a lot of Analog Circuit Design books (also shown in the given weblink - scroll down), especially R. Jacob Baker's book on "CMOS Circuit Design, Layout, and Simulation", as well as Allen & Holberg's book, s. this excerpt: View attachment Allen+Holberg_Chapters_1-9.pdf

 

[vashistha]

Thanks erikl...

 

[ramesh28]

standard cell height in technology node 45nm => 1.4um

You can refer this to know better
https://usebackend.wordpress.com/2012/10/25/asic-physical-deisgn-for-stdcells/

 

[littlej_zju]

We usually call std cell libs height as 7T, 9T, 12T (tracks). The track herein is metal1 minimum pitch (width+space).
For example,
65nm, metal1 pitch 0.2um (width/space=0.1um/0.1um). 7T cell height is 1.4um (0.2*7).

 

[vashistha]

Thnx ramesh28 & littlej_zju

 

[Prashanthanilm]

Hi ,

The Standard Cell Height is derived from metal pitch.
Metal Pitch will be Via to Via , Line to Line (Not used in many libraries) , Line to Via and pSuedo Via .
Also depends on the Application of the Library.

High Density , High Performance or Density or Performance .

When you decide the Height , the DRC rule are referred recursively to place the pins and make the library Porous .

 

[vashistha]

Hi Prashanthanilm,

I dont understand what are you trying to explain. Can u Please make it more clear.

Thanks