STAMP model for DDR SDRAM?

[jkfoo]

.lib stamp

Has anyone familiar with or ever come across a STAMP model for DDR SDRAM?

 

[eternal_nan]

You can't check DDR SDRAM interface timing using
STAMP models, or any other Primetime models for
that matter. In order to get good results the IO timing needs to be simulated using a good model
of the bonding wire, package trace and board trace
behaviour, using spice in order to determine if the
IO timing is met. Primetime is meant to be used for
on chip timing mainly, certainly not fast interfaces
like DDR SDRAM.

 

[sri1502]

Hi
I also heard few people talking about stamp model or .lib model to check DDR timing. I haven't come across anyone who actually did it successfully.

I also attempted to create a stamp model or some kind of model to check DDR io timings, I was not successful too, so I ended up checking in a traditional way

Let me know if you are interested to know the problems I faced?