[STA] Skew calculation for setup and hold violation equation

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maulin sheth

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Hello All,

Equation for
setup : t(ck-q) + t(combo) < Clock period + clock skew - setup
hold : t(ck-q) + t(combo) > clock skew +hold

I want to know that how skew will calculated in following situation for setup and hold violation on the basis of above equation.

1. ff1 is +ve edge triggered and ff2 is -ve edge triggered.

2. ff1 is -ve edge triggered and ff2 is +ve edge triggered.

Are we calculate skew w.r.t only +ve edge triggered or something else for above 2 situations?

Thanks in advance.

With Regards,
Maulin Sheth
 


Hi.

Clock skew must be calculated as difference between launch and capture clock latencies for adjacent flip-flops in all shown cases. Launch and capture clock latencies will be different for positive and negative edge triggered ffs.

Best regards,
Kuxx.
 

Thanks Kuxx,

Can you please tell me that for calculation of clock latency, we just consider combo delay in path and source latency only?
Can you please guide me in depth for better understanding?

Thanks in advance.

With Regards,
Maulin Sheth
 

For calculation of clock latency we consider all timing delays in clock path: delays at nets in path (if we are speaking about physical design) and delays at all timing arcs in all gates in the path - usually combo but in case of using clock-gating - sequential too.

Best regards,
Kuxx.
 

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