SRAM SNM Simulation - Hspice

[phuang]

Dear all,


I want to do some work on SRAM. I coule not get a reasonalbe SNM value. Could you kindly help me to fix the problems?

First, I used the inverter's VTC to get the butterfly. The lib is ‘PTM_bulk_32nm.lib’. As the graph shows, the Hold SNM is about 200mV, and the Read SNM is about 100mV. (please check the attachments)

Then, I used two methods to find the SNM, one is the graph method proposed by E. Seevink, F.J. List et al (JSSC 87), we called SNM_Graph method here, and the other is the called “Trail_and _Error” method, I used a DC source to model the noise, and to find the largest Vnoise that won't flip the state according to the definition “The minimum voltage that flips the state”, and take the largest Vnoise as the SNM value. And finally, I get the Table 1.( PTM_bulk_32nm.lib)

Trial_and_Error SNM_Graph
Hold SNM(V) 0.221 0.222
Read SNM(V) 0.053 0.112

For hold SNM, the results are nearly the same, but the results for RSNM, the result from the SNM_graph is nearly twice the result from Trial_and_Error method. According to the VTC in Fig.1, it seems that the SNM_Graph method is more accurate , since the results are closer to the VTC. But in my opinion, the Trail_and Error method should be right. Because it is directly from the definition of SNM. I am puzzled at the large difference between these two.

Could you kindly help me understand the problem? What are the possible reasons? or how do you compute the SNM value?

Thank you very much.


Regards,
phuang



The scripts are following:

*snm_graph.sp

.lib './PTM_bulk_32nm.lib' tt
.GLOBAL VDD
.PARAM VDD=0.9V
.options list post
.temp 100

.PARAM U=0
.PARAM UL='-VDD/sqrt(2)'
.PARAM UH='VDD/sqrt(2)'
.PARAM BITCAP=1E-12

MPL QD QB VDD VDD pmos l=32n w=36n m=1
MNL QD QB GND GND nmos l=32n w=72n m=1
MPR QBD Q VDD VDD pmos l=32n w=36n m=1
MNR QBD Q GND GND nmos l=32n w=72n m=1
MAL BLB WL QBD GND nmos l=32n w=36n m=1
MAR BL WL QD GND nmos l=32n w=36n m=1

VVDD VDD GND DC=VDD
VWL WL GND DC=0v
CBLB BLB 0 BITCAP
CBL BL 0 BITCAP
.IC V(BL)=VDD
.IC V(BLB)=VDD

EQ Q 0 VOL='1/sqrt(2)*U+1/sqrt(2)*V(V1)'
EQB QB 0 VOL='-1/sqrt(2)*U+1/sqrt(2)*V(V2)'
EV1 V1 0 VOL=' U + sqrt(2)*V(QBD)'
EV2 V2 0 VOL='-U + sqrt(2)*V(QD)'
EVD VD 0 VOL='ABS(V(V1) - V(V2))'

.DC U UL UH 0.01

.PRINT DC V(QD) V(QBD) V(QB) V(Q) V(V1) V(V2)
.MEASURE DC MAXVD MAX V(VD)
.MEASURE DC SNM param='1/sqrt(2)*MAXVD'
.END



*I swept the Vnoise to find the largest value that would not flip the state of the cell . The found largest Vnoise was then regarded as the SNM.
*Here is how the 53mV comes from.
*1) sweep Vnoise from 0v to 1.5V at the step of 10mV, and find the VQ and VQB flip when after Vnoise=0.05V
*2) change the Vnoise by hand to find the acurate largest Vnoise that won't flip the VQ & VQB,


*Trial_and_Error.sp

.lib './PTM_bulk_32nm.lib' tt
.GLOBAL VDD GND
.PARAM VDD=0.9V
.options list post
.temp 100

.PARAM VNOISE=0.053V
.PARAM BITCAP=1E-12

MPL Q QBN VDD VDD pmos l=32n w=36n m=1
MNL Q QBN GND GND nmos l=32n w=72n m=1
MPR QB QN VDD VDD pmos l=32n w=32n m=1
MNR QB QN GND GND nmos l=32n w=72n m=1
MAL BLB WL QB GND nmos l=32n w=36n m=1
MAR BL WL Q GND nmos l=32n w=36n m=1

VVDD VDD GND DC=VDD
VWL WL GND DC=VDD
VNOISEL QBN QB DC=VNOISE
VNOISER Q QN DC=VNOISE
CBL BLB 0 BITCAP
CBLB BL 0 BITCAP
.IC V(Q)=VDD
.IC V(QB)=0v
.IC V(BL)=VDD
.IC V(BLB)=VDD

.TRAN 0.1N 1.5N UIC

.PRINT TRAN V(Q) V(QB) V(BLB) V(BL)
.END


*run_vtc.sp

.lib './PTM_bulk_32nm.lib' tt
.probe tran V(IN) V(OUT)
.global VDD GND
.options list post=2
.temp 25

.param VDD=0.9V
.PARAM BITCAP=1E-12

MPL out in VDD VDD pmos l=32n w=36n
MNL out in GND GND nmos l=32n w=72n
MAL blb wl out GND nmos l=32n w=36n
Vdd VDD GND VDD
Vin In gnd VDD
Vwl wl gnd VDD
Vblb blb gnd VDD
CBLB BLB 0 BITCAP
.IC V(BLB)=VDD

.dc vin 0 VDD 0.01

.print dc v(in) V(out)
.end

 

[santhosh.vlsi]

Hi..
Find some materials on SNM.They may help ....

Thank you

 

[pratap1708]

can any body give the link from where I could download Hspice.

 

[vijay.mani884]

its not a free tool, it is a licensed product of synopsys. though there are many spice simulators are available online which you can download and write small spice decks. to name a few- tanner, LTSpice. I have used both of them..

 

[pratap1708]

dear vijay thanks alot..
can u just tell me 1 more this " can LTspice or tanner be used to replace polysilicon as Gate material with carbon nano tube ,CNT ?"

 

[vijay.mani884]

sorry dude.

I haven't come across this thing of changing/replacing the Poly with CNT. Possibly you can check it at their website. may be u can get some info their.

 

[imfresh]

I think that the Trail_and Error method does not follow the definition of SNM unless you remove one of the noise voltage source from the schematic.

 

[imfresh]

I was wrong yesterday......your code greatly helped me! Thanks! And I get the reason which u found.

SNM is static noise margin, so u can't run tran simulation to get SNM. u should run dc simulation by sweep the noise voltage. I have tryed it. The two methods have the same results.