Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Sram design code in verilog

Status
Not open for further replies.

affreen

Newbie level 3
Joined
Mar 21, 2013
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,296
Can sram be designed in verilog when it is being tested for mbist architecture,or can i use RAM model for mbist architecture
 

Pl clearify yr question again...I can't understand what you want.
You want to design memory..which can be tested through MBIST?
All type of memory can be tested through MBIST.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top