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square root operation using VHDL

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insan kamil

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can u help me guys

i am doing a square root operation using VHDL and implementation on FPGA.
first i need to interface a keypad 3x3. my VHDL program is:

entity scanner is
port (R0,R1,R2,R3,CLK: in bit;
C0,C1,C2: inout bit;
N0,N1,N2,N3,V: out bit);
end scanner;

architecture scan1 of scanner is
signal Q1,QA, K, Kd: bit;
alias Q2: bit is C0; -- COLUMN OUTPUT WILL BE THE SAME
alias Q3: bit is C1; -- AS THE STATE VARIABLES BECAUSE
alias Q4: bit is C2; -- OF STATE ASSIGNMENT

begin
K <= R0 or R1 or R2 or R3; --THIS IS THE DECODER SECTION
N3 <= (R2 and not C0) or (R3 and not C1);
N2 <= R1 or (R2 and C0);
N1 <= (R0 and not C0) or (not R2 and C2) or (not R1 and not R0 and C0);
N0 <= (R1 and C1) or (not R1 and C2) or (not R3 and not R1 and not C1);
V <= (Q2 and not Q3 and K) or (not Q2 and Q3 and K) or (not Q2 and Q4);
process (CLK) -- PROCESS TO UPDATE FLIP FLOPS
begin
if CLK = '1' then
Q1 <= (Q1 and Kd) or (Q2 and not Q3 and K) or (not Q2 and Q3 and K) or (not Q2 and Q4);
Q2 <= (not Q2 and not Q3) or K or Q4;
Q3 <= not Q3 or Q1 or (Q4 and not Kd) or (not Q2 and K);
Q4 <= not Q2 or Q1 or (Q3 and not Kd) or (not Q3 and K);
QA <= K or (QA and not Q1); -- first debounce flip-flop
Kd <= QA; -- second debounce flip-flop

end if;
end process;
end scan1

this is the program i wrote to interface a 3x3 keypad to a xillinx spartan 3 starter kit board. can u check it.
Example;
IF BUTTON 1 IS PRESSED, THE OUTPUT IS 0001..

I also need help for a VHDL program to display the numbers on an LCD. This part is also important because it is where i show my result.
 

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