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Spike restrain in DC-DC

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overmars

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Hi, all

When the last stage or the last but one stage pulse especially in PWM drives capacitive or inductive load, there happens to be some unwanted spikes which are pretty large , will affect the power supply ,so that many cells in the circuits latch up or can't work.
Could any one tell me how to reduce or eliminate the spike signals? Any materials provided better.

Thank you in advance!

Regards
 

you can put a resistor serial to NMOS and PMOS in the last two inverter
 

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