Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

SPICE comparator simulation problems

Status
Not open for further replies.

jkarran

Newbie level 6
Joined
Mar 27, 2012
Messages
11
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Location
UK
Activity points
1,392
I'm having trouble getting all but the very simplest of SPICE simulations to run when I include a comparator....

I'm using some version of (presumably?) SPICE embedded in ALTIUM DESIGNER 6.9, the error I get is 'timestep too small', I suspect it's associated with oddly unstable and unrealistic looking 'high' (full of glitches) output, the low output state seems to be fine, often a few cycles of the input sinusoid simulate before it fails.

Even a simple very circuit:A small (2V, 50KHz p-p) sinusoid into +IN, -IN to 0V and a decoupled (2x1uF) +-2.5V supply seems to fail. I'd expect a square wave out, *if* it runs I mostly get a mess of high frequency glitches. I'm using or attempting to use various MAXIM models, for example MAX9140, model available from **broken link removed** the model seems to need to be re-named with a .ckt extension (which I've done) and as I'm simply replacing the sim model of another device I've checked and re-assigned the pins to the correct schematic model pins (I'm happy that bit is right). I've tried various devices/models, some with more success than others but none are trouble free and behaving as expected.

MAX9140 boasts rail to rail inputs (I've also tried attenuating the input sinusoid to ~1V p-p so it's nowhere near the supply rails), 3 to 5V single supply operation and a push-pull OP which I've tried OC and driving a 10k load. **broken link removed**

Any and all help appreciated! Cheers,
James
 

Have u tried ltspice ?
send your model or asc file
 
I'm using the model from Maxim's website, it's linked above.

No, I haven't tried different simulators (I assume that's what Itspice is, Google comes up with a broken link top of the list). I'm trying to avoid duplicating work as it's Altium we use I'd like to get it working properly in there.

<edit> Ok, this gets stranger. I've just simulated *exactly* the simple circuit described above (having not done so today and unable to remember whether I'd tried it with the MAX9140) and this time it works. It's copied and pasted from a slightly larger schematic but the removed parts don't interact in any way with this piece apart from sharing the same sinusoidal source.
 
Last edited:

Any more ideas?

This still doesn't work even on the same schematic sheet as other parts when sharing only Vcc, Gnd & Vee (which are dead flat, ripple free as you would expect using ideal sources in a sim), it only works in isolation on its own schematic sheet. For example: transient analysis of the circuit below fails at around 3cycles (of the 10 requested). Signal sin and buffsin are indestinguisable. Remove the opamp buffer and it simulates just fine. I'm using default simulation settings in Altium. 'Timestep too small' is the usual error.

The squarewave output trace for this circuit isn't even showing the glitchy instability I've seen in other failed simulations.

What am I missing?!

simple sim comp circuit.jpg
 
Last edited:

U are missing a resistor 10k-10meg between output of buffer and comparator input.
remember the comp input is an virtual ground that means u will read almost zero volts at comp input and now u loading the buffer .
 

But there's no feedback around the comparator*, the input is high impedance surely? I'm seeing no attenuation of the op-amp output which I would expect were it effectively driving into a short.

*I think there's a small amount of +ve feedback internally to speed transitions.

On the other hand... 10k in series has made this particular very simple sim run (I've tried this in the actual circuit I want to simulate with no success). It gives me something to think about, thanks! Perhaps the simulator doesn't like the op-amp driving the idealised input capacitance but then again the op-amp model has some output impedance. Looking through the datasheet again it seems the input stage of this comparator has a back-to-back pair of diode strings (2 in series) between +in and -in with 4k in series with each pin, I should be aiming to keep input differentials small (<2Vf) but even for 'large' input signals the impedance to ground is ~8k, something the MAX4130 can drive comfortably. <edit> Adding a 10k load to the comparator OP causes the sim to fail.

There's still something fundamental I'm missing here but thanks tor the tip.
 

Try removing the decoupling capacitors. They effectively cause infinite current at switch-on. They won't have any effect on the simulation without some series resistance anyway.

Keith

---------- Post added at 09:41 ---------- Previous post was at 09:37 ----------

Also, post your netlist. It is possible that you haven't set up the template correctly so the model isn't conencting to the correct pins. That is a common cause of simulations failing.

Keith.
 

I've tried with and without the decoupling once I'd remembered the simulation voltage sources are ideal anyway. I'm not sure how to export the netlist but I'm pretty confident it's right, it'll generally run a few cycles of a transient analysis roughly as expected before it fails. I'll look into it and get back with it if I can figure out how. Thanks.

<edit>It's a .txt version of the .nsx file Altium exports (Altium seems to use XSpice whatever that is, I've barely touched a simulator for a decade so I'm more than a little rusty, please bear with me)

View attachment Sheet2.txt
 
Last edited:

It is difficult to know what to suggest because I think the problem is with Altium. I just ran your netlist through my simulator and it is fine.

Look through your documentation at the .OPTIONS. Look for ITL4 and increase it from the default (10 in my simulator). Also PIVREL=0.999 may help. Look at VNTOL, RELTOL and ABSTOL although I rarely find they help (and reduce accuracy). Another option is to set GEAR integration in the TRANSIENT statement.

Keith.
 
Thanks Keith, I'll have a look at those, see if they make a difference, there is an advanced options menu, I'll see what I can find.

The exact file I uploaded does simulate on my machine too, it's just really temperamental! Add a 10k load to the OP and it fails, drop the (seemingly unnecessary) series resistor and it fails, look at it funny and it fails :) The one attached to this post only manages 2 1/2 cycles, the only difference is the series resistor has been removed.

jk (A fellow Yorkshireman)
 

Attachments

  • Sheet2-1.txt
    5.2 KB · Views: 88

Thanks!

Changing those parameters ITL4 (default is 40 in Altium) and PIVREL (default 0.001) made some difference (still flaky but better).

Changing to GEAR integration seems to have sorted it and as an added bonus the results now better match the expected device performance.
 

Glad it helped. Just for information, the second netlist simulates fine for me. It might be worthwhile considering LTspice. I don't often use it but I believe it is pretty good. I don't normally have simulation problems with Maxim models, although it is possible it is a tricky model for some reason.

Keith.
 

Just did it on spice with no glitch
10k output problem ...100k output very good must be the output sink currrent
 

I tried various pullup/pulldown resistor values to VCC/VEE/GND and cannot get it to fail with SIMetrix.

Keith.
 

LOL :)

Fixed one error, got another (running the marginally more complex circuit I actually want to look at) around 100cycles in. The message is genius:

doAnalyeses: Impossible error - can't occur!
Panic: breakpoint in the past - HELP!

I'm going to try a different sim, this is getting silly. Thanks for all the help so far!
 

Date sheet says single rail supply so why using dual supply ?
 

To save ac coupling and biasing the signal, should be no different to to using a rail splitter (voltage divider and buffer) as the 'ground' but simpler to simulate.

... Unless GND is a special global node used inside the subcircuit the model? You could be onto something there!
 

You are usually safer using node 0 (zero) for ground unless you define a global GND net and connect it to node zero. I believe some simulators do that for you so you don't have to set it up yourself.

Keith.

---------- Post added at 17:54 ---------- Previous post was at 17:54 ----------

Just to add, there is no GND in your circuit and models - they all use zero.
 

Looks like Altium does that, GND is set as the reference node and appears to have been replaced with 0 in the netlist.

I've always read single supply on a data sheet to basically mean 'low voltage', after all how can a device tell if the single supply it sees is actually a pair in series. It's slightly different in the computer modeling world though I suppose. I did try setting up the schematic for true single supply operation in case I was accidentally misusing reserved/special net names used within the Maxim models but it made no difference.

Anyway, Altium sim is still flaky even after adjusting the the various suggested settings (I can now simulate 100+ cycles before it falls over) but it's easy enough to export netlists and the LTSpice free sim appears robust and much much faster. I've just realised that's what dselec was suggesting from the outset but I read it as itspice (which turns up not much of use on google) which threw me.

Thanks for all the help. It's a shame I didn't get Altium working better but I have a workable solution that's probably better than what I had anyway.
jk
 
Last edited:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top