I2C has a few versions. The common version uses open drain and allows several features that SPI lacks.
I2C has devices that know their address. 128 devices or more can be on a bus, in theory at least. SPI requires an chip select per device.
I2C allows multi-master where two ICs can start communications. SPI only allows one master for the bus.
I2C allows pulse-stretching to allow a slave device to denote that the device is still busy. SPI requires a protocol be implemented in software if this can occur.
There is a high-performance I2C mode which replaces the open drain with a bidirectional buffer. This prevents pulse stretching and multi master, IIRC.
SPI is more for high performance. There is even a QSPI standard to allow 100mbps as 4 data lines running at 25MHz.