Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] sparten 3e PROM programming

Status
Not open for further replies.

Gangadhara Reddy

Newbie level 2
Newbie level 2
Joined
Dec 17, 2013
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Visit site
Activity points
11
hi
i programmed PROM. IN FPGA I used (M0,M1,M2) mode
ISE impact tool displayed PROGRAM SUCCEEDED.
But i am not getting output,
please help me
 

it is a simple half adder program.
program is like this
half adder

Code Verilog - [expand]
1
2
3
4
5
6
7
8
module add(sum,cout,a,b
    );
     input a,b;
     output sum,cout;
     xor a1(sum,a,b);
     and a2(cout,a,b);
     
endmodule



add.ucf is:

Code Verilog - [expand]
1
2
3
4
NET "a" LOC = L13;
NET "b" LOC = L14;
NET "cout" LOC = E12;
NET "sum" LOC = F12;



what can i do?
 
Last edited by a moderator:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top