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Spartan 3E FPGA Configuration by JTAG

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max_rit

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Hello everyone,

I am trying to configure a Spartan 3E FPGA by JTAG via FT232R (FTDI chip). So, I want to know the exact JTAG configuration steps for Spartan 3E FPGA .I have already found the steps for Virtex-4 family ,but they happened to be slightly different from that of Spartan 3E's . So, can anybody please let me know the detailed JTAG configuration steps for Spartan 3E family FPGA (details of state of TDI, TMS and TCK pins)???

Here I have attached the configuration details for Virtex-4 family FPGAs.. configuration details.JPG
Thanks in advance...
 

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