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Sources vs VDD terminals

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Osawa_Odessa

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I am learning how to use Cadence and completely beginner. And here is what I am confused.
NCSU_Analog_Parts: contains all the required blocks for designing an analog schematic
(sources, GND and VDD terminals, transistors, R, L, C, diodes, etc.)
Could you tell me what is the difference between "sources" and "VDD terminals"?
 

Source - voltage or current source
VDD terminal - it's simlpe terminal (usually connected to positive terminal of supply voltage source (vdd net))
 
Thanks! Today, I also get it while simulation. Can you suggest me some good material to learn cadence for a completely new user?
 

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