Oct 9, 2018 #1 A adrian10 Newbie level 2 Joined Oct 9, 2018 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 18 Hi All, On page 535 in the following user guide, what are the inputs and outputs? https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf By any chance is there any Verilog source code available for the flow control? Or can I refer to any documents for Verilog code? I wanted to design and verify the flow control for DMA integration. Any relevant pointer would be very helpful. Thank you so much! Thanks, Adrian Last edited: Oct 9, 2018
Hi All, On page 535 in the following user guide, what are the inputs and outputs? https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf By any chance is there any Verilog source code available for the flow control? Or can I refer to any documents for Verilog code? I wanted to design and verify the flow control for DMA integration. Any relevant pointer would be very helpful. Thank you so much! Thanks, Adrian