eric0825
Newbie level 6
Some VCO issues
Deal all:
I am a rookie of IC design engineer~I got some problems recently...
1.While design VCO, how to estimate the VCO amplitude? I know it is equal to the bias current multiply by the equivalent tank resistance with a efficiency factor~but here the problem in real design is how to estimate the tank resistance? coz the model provided by foundry of the passive element is not just a resistance in parallel with ideal inductance but more complicated~so how to calculate it or simulate by EDA tool?
2. I've study many papers about VCO, but i can't still understand what differential amplitude and single-end amplitude is, does it means the amplitude reference to another VCO output and reference to ground?
Deal all:
I am a rookie of IC design engineer~I got some problems recently...
1.While design VCO, how to estimate the VCO amplitude? I know it is equal to the bias current multiply by the equivalent tank resistance with a efficiency factor~but here the problem in real design is how to estimate the tank resistance? coz the model provided by foundry of the passive element is not just a resistance in parallel with ideal inductance but more complicated~so how to calculate it or simulate by EDA tool?
2. I've study many papers about VCO, but i can't still understand what differential amplitude and single-end amplitude is, does it means the amplitude reference to another VCO output and reference to ground?