solution for large memory requirement for FPGA

[win2010]

Hello,
I am designing "time interleaver" for DVB-T2, which is require large memory to be store before interleave.
Means, 32400 values in a one row and like that 1024 column of data need to be store before doing operation.

32400 rows, 1024 columns and each location of 17-bits wide.

32400 * 1024 * 17-bits = 564019200 bits need to be store....

What is the solution for this to be done.......?

I am using Spartan 3A-DSP........

 

[mrflibble]

Since the spartan-3 doesn't have enough memory for that, you'll have to use external DRAM.