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Solder mask and solder paste in PCB stack up

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engr_joni_ee

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I wondering about solder mask and solder paste and how to add them in stack up. I think we only need to add solder mask on top and bottom in the stack up because it spread everywhere on the top and bottom except the soldering pads. How about thickness and dielectric of solder mask. I have defined 0.5 thou as thickness and 3.3 as dielectric on top and bottom solder mask, does it make sense ? or I need to change these numbers.

Regarding solder paste, I guess there is no need to add in the stack up because it is only located on the soldering pads and would not be everywhere like solder mask.
 

The question refers to the user manual of your layout tool, how padstacks are defined in the tool. Top and bottom solder mask and -paste are standard layers provided by the padstack editor of all usual layout tools. There are probably predefined padstack types like through-hole or SMD with a respective populated layer set.

Some tools provide overall size modification of all mask and paste apertures, others expect the technology specific variation (mask enlargement and paste reduction) provided in the padstack definition. All recent layout tools are shipped with at least some component libraries that can be used as template for your own definitions.

As for the PCB stackup, the layout tool needs to know the layer order and possibly the type, e.g. plane or signal, but not necessarily layer thickness and material properties because they don't affect the generated PCB production files. Some tools provide however a stackup visualization or 3D model generation. Also trace impedance and clearance calculation tools or an SI analysis tool interface may use thickness and Er information. ODB++ standard has an option for stackup information but it's rarely used by PCB manufacturers. They still expect text files and drawings describing the stackup.
 

Soldier paste is not part of the stack up.

Solder mask is generally defined with a minimum thickness, but it’s not a controlled parameter. Trace thickness, etc., will cause variations in the SM thickness. Also, there are different types of solder mask material and different processes, e.g., SMOBC, ENIG, that will yield different results.
 

Yes, that was my guess that solder paste should not be added as dielectric layer in PCB stack up for calculating the impedance of single and differential ended.

The impedance with a given trace width and gap is a function of dielectric thickness and it's dielectric constant. I need to add solder mask layer on top and bottom in the stack up that will effect the impedance of single and differential signals, kindly let me know realistic numbers for thickness and dielectric constant for solder mask layer.
 

Personally, I would specify the impedance and tolerance, and let the PCB vendor deal with it. You don't REALLY care about SM thickness, you care about impedance. If a few ohms deviation is that important I would suggest you use stripline so that the SM has no effect. For RF PCBs, we generally leave the RF traces on the outer layer bare; no SM.
 

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