I'm designing a SEPIC converter. I have everything done, power components picked, board laid out, but I'm stuck on the compensation network.
The SC4501 (Warning! The datasheet ONLY covers BOOST, not SEPIC) says that it needs an R and C in series to form the network. These components are adjusted to form a zero at the same frequency as the output (dominant?) pole to cancel it out.
The output pole frequency is at F=1/(2*PI*R_Load*C_Output), which is calculated to be at 181Hz. (20 Ohm load, 44uF output capacitance)
Therefore, the R and C in the compensation network should have a corner frequency of 181Hz. For example, I could pick a 10nF capacitor and a 88K resistor
Assuming I have done all the previous steps correctly, how does the ratio of R to C matter? I could increase C and decrease R, and the network would have the same corner freq, but the datasheet says the gain would change. How do I pick my components?
I'm way out of my depth with all this analog stuff :???:
I think he's talking about the error amp compensation network, not the output bypass capacitor.
To determine the correct values for a compensation network, you should actually analyze the open loop transfer function of the converter. Choose a crossover frequency, and a phase margin. Then that will tell you what phase and gain the compensation network will need at the crossover frequency. Design should be straightforward from there on.
From this suggested working model design , I would simply follow their lead and choose a single pole RC feedback at just above the operating frequency so phase shift is < 45deg and adequate harmonic attenuation with the feedback voltage bias ratio,N set to Vout= N * 1.25V They run at 1.5Mhz here.
Are you talking about building the circuit and testing the gain and phase in real life? Or do you mean finding the location of all the poles and zeros and plotting them?
This paper says that to choose the crossover frequency, find the RHPZ and the resonant frequency of the output cap and L2, take the lowest one, and divide by six.
The RHPZ freq is 58.2 kHz.
The resonant freq is 5.11 kHz
So my crossover frequency is 850Hz
choose a single pole RC feedback at just above the operating frequency so phase shift is < 45deg
By operating frequency, do you mean the output (dominant) pole? How do you verify the correct phase shift? I have no idea, since all the papers I've read seem to skip phase entirely
Are you talking about building the circuit and testing the gain and phase in real life? Or do you mean finding the location of all the poles and zeros and plotting them?
Either will work, assuming your circuit model is accurate. And you need to find the overall gain of the transfer functions, not just the pole and zero locations.
If you go the model calculation route, make sure you keep in mind that the transfer functions vary significantly based on whether you are operating in DCM or CCM.
This paper says that to choose the crossover frequency, find the RHPZ and the resonant frequency of the output cap and L2, take the lowest one, and divide by six.
The RHPZ freq is 58.2 kHz.
The resonant freq is 5.11 kHz
A crossover frequency well below the RHPZ frequency is a good idea, but it's often feasible to have it be well above the resonant frequency of the LC, especially when using a current mode controller like this. So if you want you can aim for a much higher bandwidth than that.
The thing that I'm designing this for doesn't have very tight requirements for transient response, but if I could improve it, its worth investigating. How do you make a SEPIC that goes into DCM more? Reduce inductor size? Aren't there significant disadvantages, like reduced efficiency? If I were to do this, is there any different way that I have to design the compensation network?
As you guys have probably guessed, I have no formal training in electronics at all
10KHz should be feasible. For a good beginner's guide to feedback compensation, read this app note: https://www.venable.biz/tp-03.pdf
If you find that helpful, you should read all of venable's literature. It's all quite helpful.
Just increase the ripple current amplitude to be greater than the max average inductor current (in both inductors). Can be done through decreasing frequency or decreasing inductance.
Aren't there significant disadvantages, like reduced efficiency?
You can use a similar procedure as in the above application note for designing with DCM converters, but the results will differ somewhat, since a DCM converter has a somewhat different open loop transfer function.
you will find that a dcm sepic is INTRINSICALLY STABLE........it cannot go unstable because its phase cannot go above 180 degrees.
but it can ring like mad if you dont watch the phase margin.............7W is nothing, just go DCM.
ccm SEPIC is known for its difficult feedback loop, i think its true to say that sepic has never been fully analysed mathematically in its feedback loop.
...and remember coupled inductor, otherwise your L's and C will be resonating like billy-O