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single R/W transactions on PCI bus

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buenos

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hi.

i made a PCI target interface on FPGA, but it works correctly only if I do individual (single Dword) read or write transactions, not bursts. and we have to wait 300-500ns between them.

on the PC what I used, and with teh test software (HW direct), if I want to read more Dwords, it seems it doesnt make bursts from the input data, but it makes individual (single) accesses.

its good for me.
but what if i plug my PCI card into another PC?

does it depend on the PC chipset, or on the BIOS, or on the test software?

how can I make shure, in the driver software, that nothing will combine the single accesses into bursts?
 

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