SineWave Inverter: Dc Bus Voltage to Sinewave conversion ration

[adnan012]

hi,

I want to ask few question about pure sine wave inverter.

If DC bus voltage are 200v. PWM frequency 20KHz, Duty Cylce 10-90%

1) What is the maximum level of Sine wave voltage which can be generated after filtering the output voltage?

2) How sine table is generated?

 

[KlausST]

Hi,

1) for a single phase output (H bridge) it is:
min: 200V x 10% = 20V
max: 200V x 90% = 180V

it is independent of PWM frequency.

so it is a sine voltage (DC biased to 100V) with 160Vpp.
this means 80Vp, or 56.5V RMS (both referenced to the 100V bias voltage)


2) for n "samples" per fullwave: (n = integer)

for i = 0 to n-1
 pwm(i) = 0.5 + 0.4 * sin(360° * i / n)
next i

if you have a 10 bit pwm you should multiply each pwm(i) with 2^10

Klaus

 

[brushhead]

In a three phase system, the output RMS is basically (Vdc/2)/(sqrt(2)*)*(sqrt(3)).

Sources of PWM can be Space Vector modulation or a simple sine/triangle reference. If you use third harmonic injection you get roughly 15% more AC volts for the same DC bus voltage.

Sine triangle generation is tyhe comparison of a high frequency trangle waveform (which is your PWM frequency) compare with a slow sine wave (which could be 50Hz). If the peaks of each are the same, you will develop maximum output volts. If you reduce the sine reference your AC volts go downwards.

Third harmonic generation is the addition of a 150Hz signal to that of the 50Hz, of about 15% amplitude. This disappears when running as a three phase source but then gives you your voltage boost.

Regards,
Rob.

 

[adnan012]

i am confused


"so it is a sine voltage (DC biased to 100V) with 160Vpp.
this means 80Vp, or 56.5V RMS (both referenced to the 100V bias voltage)" @KlausST

What is the peak voltage with respect to dc bus ground?

 

[brushhead]

You should not be referencing to ground if you are using a full 'H' bridge inverter?

 

[KlausST]

Hi,

What is the peak voltage with respect to dc bus ground?

-->

max: 200V x 90% = 180V

Klaus

 

[adnan012]

Thanks for reply.
To generate 50Hz sine wave

Switching Frequency = 20 KHz
No of samples 20KHz/50 = 400 samples in look-up table.

Currently i have adopted the technique given in

https://www.romanblack.com/one_sec.htm

"Making multiple sinewaves of highly accurate frequency" New 21st Feb 2011.

There are 64 samples in the table, PIC micro controller timer interrupt occur after every 50 usec to update the samples.

I think i am not getting the proper peak voltage. Or i am making some mistake.

 

[KlausST]

Hi,

Or i am making some mistake.

sorry, I can´t find sine table nor your program. So it´s impossible to verify.

Klaus

 

[adnan012]

Algorithm given at https://www.romanblack.com/one_sec.htm

in the following code variables unsigned int wave absolute 0x15 and unsigned char wave_1 absolute 0x16; are created at consecutive locations

/ 16bit DDS algorithm to make one sinewave of accurate freq using
  // 16 MHz xtal (4 MIPS on PIC 16F)
  #define BDA_697Hz   365               // constant to make 697 Hz
  unsigned int wave   absolute 0x15;    // 16bit accumulator for the sinewave
  unsigned char wave_1 absolute 0x16;   // overload for fast access to byte 1
  const unsigned char sine64[64] = {
  50,54,59,64,68,73,77,81,85,88,91,93,95,97,98,99,99,99,98,97,95,93,91,88,85,81,77,73,68,64,59,54,
  50,45,40,35,31,26,22,18,14,11,8,6,4,2,1,0,0,0,1,2,4,6,8,11,14,18,22,26,31,35,40,45};

  // loop and generate dual sinewave DTMF tone
  PR2 = (128-1);            // PWM at period = 128
  while(1)
  {
    while(!PIR1.TMR2IF);  // sync to start of PWM cycle
    PIR1.TMR2IF = 0;

    // calc the sinewave, and load into PWM module CCPR2L
    wave += BDA_697Hz;              // zero error Accumulation 
    CCPR2L = sine64[wave_1 & 0x3F]; // Binary Divide output (/256) and keep 6 bits
  }

*******************Modified code for Dspic33*********************************

//Code for dspi33FJ64GS610

unsigned long long int  Wave1;    
unsigned char Wave_1;

#define SyS_Clock          961000000   // pwm factor 
#define PWM_PERIOD     20000    // 20khz
#define Fout             50
#define Fpwm           (SyS_Clock/PWM_PERIOD)    // 48076 period register vaalue
#define BDA_Period   (((Fout)*(64)*(256))/(Fpwm))



unsigned char sine[64] =
 {
  0,0,0,1,2,4,6,8,11,14,18,22,26,31,
 35,40,45,50,54,59,64,68,73,77,81,85,
 88,91,93,95,97,98,99,99,99,98,97,95,
 93,91,88,85,81,77,73,68,64,59,54,45,
 40,35,31,26,22,18,14,11,8,6,4,2,1,
 };

50usec interrupt 

// to get 90 percent of duty 99*450 is  the maximum value for duty register

{
 Wave1    =   Wave1 + BDA_Period;
 Wave_1 =    (Wave1>>7 & 0x3F);
 DutyCyclePWM1(sine[Wave_1]*450);    

}

 

[KlausST]

Hi,

const unsigned char sine64[64] = {
50,54,59,64,68,73,77,81,85,88,91,93,95,97,98,99,99,99,98,97,95,93,91,88,85,81,77,73,68,64,59,54,
50,45,40,35,31,26,22,18,14,11,8,6,4,2,1,0,0,0,1,2,4,6,8,11,14,18,22,26,31,35,40,45};

This you defined twice. Why?
The values are from 0...99. Are you sure this is correct?

// to get 90 percent of duty 99*450 is the maximum value for duty register

Means 100% is a value of 99*450/0.9 = 49500.

If you want a 20kHz PWM and 100% duty cycle means 49500 ticks, then you need a counter frequency of 990MHz.
Althoug this meets

#define SyS_Clock 961000000 // pwm factor

It seems not correct to me.

What hardware do you use?

Klaus

 

[adnan012]

i am very thankful for your reply.

I am using dspi33FJ64GS610. It has PWM resolution of 1.04nS. I have tested it on a scope. it works well. The core clock is 120MHz which i divided by 3 to run controller at 30 MHz. There is frequency multiplier in the device to generated high speed clock for PWM module.

DutyCyclePWM1(sine[Wave_1]*450); Because i am using Gate drivers (with bootstrap and not isolated supplies), maximum duty is 99*450 = 44550. there is also a 2uSec dead time (built in the pwm module).

To get one half cycle of sine wave the lookup table is

unsigned char sine64_1[64] =
{
0,0,0,1,1,2,4,6,8,11,14,18,22,26,31,
35,40,45,50,54,59,64,68,73,77,81,85,
88,91,93,95,97,98,99,99,99,98,97,95,
93,91,88,85,81,77,73,68,64,59,54,45,
40,35,31,26,22,18,14,11,8,6,4,2,1
};

There are three sine tables with 120 phase shift.

 

[KlausST]

Hi,

A typo? 120MHz / 3 = 40MHz.

If you are not in lack of memory I recommend to do the multiplying before and store 16 bit values. They are more accurate and save processing time.
Before you asked for duty cycles 10..90%, but now you use 0..99%.

Pretty high pwm clock frequency. Nice.

Klaus

 

[adnan012]

Thanks for reply.

it is 40MHZ, i mistyped it.

Is there any thing wrong with sinetable?

"do the multiplying before and store 16 bit values. They are more accurate and save processing time"
can you explain this?

 

[KlausST]

Hi,

If you now want 0...99%, then it is ok.
Additionally, like said before: you could improve processing time and resolution.

Klaus

 

[adnan012]

Thanks for reply.

unsigned char sine64_1[64] =
{
0,0,0,1,1,2,4,6,8,11,14,18,22,26,31,
35,40,45,50,54,59,64,68,73,77,81,85,
88,91,93,95,97,98,99,99,99,98,97,95,
93,91,88,85,81,77,73,68,64,59,54,45,
40,35,31,26,22,18,14,11,8,6,4,2,1
};

This table represents half sine wave cycle. There are three sine table with 120 degree phase shift. I have tested it with three half bridge legs , which generates three sine waves with 120 degree phase shift. My question is that how it works without having a complete table of sine wave (with dc offset) for example

{50 52 54 , , , ,96 ,98 ,100, 98 96 , , , , , ,50 , 48,46, , , , , , 4,2,0,0,2 ,4 , , ,46 ,48, 50}