simulations failed during IR drop and power/ground bounce simulation, what to do?

[allennlowaton]

Hello EDA fellows,
I put my design in IR drop and power/ground bounce simulations.
I obtained failed results.
The circuit should produce constant currents (20mA) for the LEDs, but after simulation showed that the current increases (now ranged 20mA~25mA )

For the IR drop, I connect a one resistor(that will have a drop of 50mV) at VDDexternal to VDDinternal and another resistor (that can have a drop of 50mV) at ground internal to ground external.

For the power and ground bounce, I just replaced the resistors with a 4nH inductors.

 

[dick_freebird]

Do you mean failed to execute, or failed to deliver the desired
simulation result?

 

[allennlowaton]

the IR drop simulation failed to meet the specifications while the power/ground bounce simulation suffers from internal time step error.

 

[dick_freebird]

Seems like the I*R simulation is suffering fromthe R (may
be the arbitrary external values, may be some internal
lack of headroom or a skew on a ground reference, etc.).

- Are these R values arbitrary, based on measured / calcs
for an implementation? Does more realism help or hurt?

- What is the mechanism for whatever degradation, is
it all attributable to simple current loop resistance or
is it something like an unanticipated offset, maybe
needing a change to where / how a feedback is picked
off, an instrumentation-amp kind of front end with both
remote gnd and remote sense, etc.?


As ti the timestep deal, I'd try giving the inductor some
series resistance for starters. If you're modeling bond
wires, use realistic R as well as realistic L. 4nH is mighty
big, a long long bond wire.

 

[allennlowaton]

Seems like the I*R simulation is suffering fromthe R (may
be the arbitrary external values, may be some internal
lack of headroom or a skew on a ground reference, etc.).

- Are these R values arbitrary, based on measured / calcs
for an implementation? Does more realism help or hurt?

- What is the mechanism for whatever degradation, is
it all attributable to simple current loop resistance or
is it something like an unanticipated offset, maybe
needing a change to where / how a feedback is picked
off, an instrumentation-amp kind of front end with both
remote gnd and remote sense, etc.?


As ti the timestep deal, I'd try giving the inductor some
series resistance for starters. If you're modeling bond
wires, use realistic R as well as realistic L. 4nH is mighty
big, a long long bond wire.

My design has an output current of 80mA. I assumed an IR drop of 50mV at the VDD and another 50mV for the ground. A 0.625ohm resistors are placed at the VDDexternal to VDDinternal and at groundinternal to groundexternal.

For the power and ground bounce, what would be the value of inductors to be used?

 

[dick_freebird]

That depends on your packaging (flip chip? hardly any;
small die in big package, 1nH/mm is an overestimate).
Then socket (if any), board (if significant), etc. You
could end up with a big nasty mesh, built by hand from
measurement & calcs.

 

[allennlowaton]

I received the document but still I'm not sure what values for the inductors and resistors to be used.

 

[dick_freebird]

Well, you have to extract or estimate that based on
what you know about the physical assembly. Figure
your best case inductance of a packaged device is
based on L=(pkg OD - die size)/2 for a wire and
internal package trace that comes out orthogonal
at the shortest point, and 1.4X that for a corner, in
a wirebond square package. But PCB pin to gnd plane
(or wherever the closest-in, low Z electrical point of
interest is) distance can also be a factor if you let it.

You should be able to get PCB sheet resistances and
package internal resistance and bond wire L,R info.
Turning that into a physically realistic electrical model
is attention to detail & grunt work.